counter_30.asy

基于Xilinx+FPGA的OFDM通信系统基带设计-程序

Version 4
SymbolType BLOCK
RECTANGLE Normal 32 0 448 272
PIN 0 176  LEFT 36
PINATTR PinName CE
PINATTR Polarity IN
LINE Normal 0 176 32 176
PIN 0 208  LEFT 36
PINATTR PinName CLK
PINATTR Polarity IN
LINE Normal 0 208 32 208
PIN 480 112  RIGHT 36
PINATTR PinName THRESH1
PINATTR Polarity OUT
LINE Normal 448 112 480 112
PIN 480 176  RIGHT 36
PINATTR PinName Q[4:0]
PINATTR Polarity OUT
LINE Wide 448 176 480 176
PIN 96 304  BOTTOM 36
PINATTR PinName ACLR
PINATTR Polarity IN
LINE Normal 96 272 96 304
LINE Normal 96 272 96 304