counter_30.sym

基于Xilinx+FPGA的OFDM通信系统基带设计-程序

VERSION 5
BEGIN SYMBOL counter_30
SYMBOLTYPE BLOCK
TIMESTAMP 2005 12 5 13 36 14
SYMPIN 0 176 Input CE
SYMPIN 0 208 Input CLK
SYMPIN 480 112 Output THRESH1
SYMPIN 480 176 Output Q(4:0)
SYMPIN 96 304 Input ACLR
RECTANGLE N 32 0 448 272 
BEGIN DISPLAY 36 176 PIN CE ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 0 176 32 176 
BEGIN DISPLAY 36 208 PIN CLK ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 0 208 32 208 
BEGIN DISPLAY 444 112 PIN THRESH1 ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
LINE N 448 112 480 112 
BEGIN DISPLAY 444 176 PIN Q(4:0) ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
BEGIN LINE W 448 176 480 176 
END LINE
BEGIN DISPLAY 96 268 PIN ACLR ATTR PinName
    ALIGNMENT BCENTER
    FONT 24 "Arial"
END DISPLAY
LINE N 96 272 96 304 
END SYMBOL