zdhw.c

ZYDAS zd1211b driver for Linux2.4

        pObj->SetReg(reg, ZD_CR102, 0x27);
        pObj->SetReg(reg, ZD_CR106, 0x20);
        pObj->SetReg(reg, ZD_CR107, 0x24);
        pObj->SetReg(reg, ZD_CR109, 0x09);
        pObj->SetReg(reg, ZD_CR110, 0x13);
        pObj->SetReg(reg, ZD_CR111, 0x13);
        pObj->SetReg(reg, ZD_CR112, 0x13);
        pObj->SetReg(reg, ZD_CR113, 0x27);
        pObj->SetReg(reg, ZD_CR114, 0x27);
        pObj->SetReg(reg, ZD_CR115, 0x24);
        pObj->SetReg(reg, ZD_CR116, 0x24);
        pObj->SetReg(reg, ZD_CR117, 0xf4);
        pObj->SetReg(reg, ZD_CR118, 0xfa);
        pObj->SetReg(reg, ZD_CR120, 0x4f);
        pObj->SetReg(reg, ZD_CR121, 0x77);
        pObj->SetReg(reg, ZD_CR122, 0xfe);
#else

        pObj->SetReg(reg, ZD_CR23, 0x40);
        pObj->SetReg(reg, ZD_CR15, 0x20);
        pObj->SetReg(reg, ZD_CR28, 0x3e);
        pObj->SetReg(reg, ZD_CR29, 0x00);
        pObj->SetReg(reg, ZD_CR26, 0x11);
        pObj->SetReg(reg, ZD_CR44, 0x34); //4112
        pObj->SetReg(reg, ZD_CR106, 0x2a);
        pObj->SetReg(reg, ZD_CR107, 0x1a);
        pObj->SetReg(reg, ZD_CR109, 0x2b);
        pObj->SetReg(reg, ZD_CR110, 0x2b);
        pObj->SetReg(reg, ZD_CR111, 0x2b);
        pObj->SetReg(reg, ZD_CR112, 0x2b);

#if (defined(GCCK) && defined(OFDM))

        pObj->SetReg(reg, ZD_CR10, 0x89);
        pObj->SetReg(reg, ZD_CR17, 0x20);
        pObj->SetReg(reg, ZD_CR26, 0x93);
        pObj->SetReg(reg, ZD_CR34, 0x30);
        pObj->SetReg(reg, ZD_CR35, 0x40);

        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR44, 0x32);
        pObj->SetReg(reg, ZD_CR46, 0x90);
        pObj->SetReg(reg, ZD_CR89, 0x18);
        pObj->SetReg(reg, ZD_CR92, 0x0a);
        pObj->SetReg(reg, ZD_CR101, 0x13);
        pObj->SetReg(reg, ZD_CR102, 0x27);
        pObj->SetReg(reg, ZD_CR106, 0x20);
        pObj->SetReg(reg, ZD_CR107, 0x24);
        //pObj->SetReg(reg, ZD_CR109, 0x09);
        //pObj->SetReg(reg, ZD_CR110, 0x13);
        //pObj->SetReg(reg, ZD_CR111, 0x13);




        pObj->SetReg(reg, ZD_CR109, 0x13); //4326
        pObj->SetReg(reg, ZD_CR110, 0x27); //4326
        pObj->SetReg(reg, ZD_CR111, 0x27); //4326
        pObj->SetReg(reg, ZD_CR112, 0x13);
        pObj->SetReg(reg, ZD_CR113, 0x27);
        pObj->SetReg(reg, ZD_CR114, 0x27);
        pObj->SetReg(reg, ZD_CR115, 0x24);
        pObj->SetReg(reg, ZD_CR116, 0x24);
        pObj->SetReg(reg, ZD_CR117, 0xf4);
        //pObj->SetReg(reg, ZD_CR118, 0xfa);
        pObj->SetReg(reg, ZD_CR118, 0x00); //4326
        pObj->SetReg(reg, ZD_CR120, 0x4f);
        //pObj->SetReg(reg, ZD_CR121, 0x77); //3n12
        //pObj->SetReg(reg, ZD_CR121, 0x13); //3d24
        pObj->SetReg(reg, ZD_CR121, 0x06); //4326
        pObj->SetReg(reg, ZD_CR122, 0xfe);
        pObj->SetReg(reg, ZD_CR150, 0x0d); //4407

#elif (defined(ECCK_60_5))

        pObj->SetReg(reg, ZD_CR26, 0x91);
        pObj->SetReg(reg, ZD_CR47, 0x1E);
        pObj->SetReg(reg, ZD_CR106, 0x44);
        pObj->SetReg(reg, ZD_CR107, 0x00);
        pObj->SetReg(reg, ZD_CR14, 0x80);
        pObj->SetReg(reg, ZD_CR10, 0x89);
        pObj->SetReg(reg, ZD_CR11, 0x00);
        pObj->SetReg(reg, ZD_CR24, 0x0e);
        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR159, 0x93);
        pObj->SetReg(reg, ZD_CR160, 0xfc);
        pObj->SetReg(reg, ZD_CR161, 0x1e);
        pObj->SetReg(reg, ZD_CR162, 0x24);
#endif
#endif

        pObj->CR122Flag = 2;
        pObj->CR31Flag = 2;

        //UnLockPhyReg(pObj);

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )

        pObj->SetReg(reg, ZD_PE1_PE2, 0x02);
#else
        //LockPhyReg(pObj);
        tmpvalue = pObj->GetReg(reg, ZD_CR203);
        tmpvalue &= ~BIT_4;
        pObj->SetReg(reg, ZD_CR203, tmpvalue);
        //UnLockPhyReg(pObj);
#endif

        HW_Set_IF_Synthesizer(pObj, M2827BF[ChannelNo]);
        HW_Set_IF_Synthesizer(pObj, M2827BN[ChannelNo]);
        HW_Set_IF_Synthesizer(pObj, 0x00400);
        HW_Set_IF_Synthesizer(pObj, 0x00ca1);
        HW_Set_IF_Synthesizer(pObj, 0x10072);
        HW_Set_IF_Synthesizer(pObj, 0x18645);
        HW_Set_IF_Synthesizer(pObj, 0x04006);
        HW_Set_IF_Synthesizer(pObj, 0x000a7);
        HW_Set_IF_Synthesizer(pObj, 0x08258);
        HW_Set_IF_Synthesizer(pObj, 0x03fc9);
        HW_Set_IF_Synthesizer(pObj, 0x0040a);
        HW_Set_IF_Synthesizer(pObj, 0x0000b);
        HW_Set_IF_Synthesizer(pObj, 0x0026c);
#if	defined(ECCK_60_5)

        HW_Set_IF_Synthesizer(pObj, 0x04258);
#endif

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )

        pObj->SetReg(reg, ZD_PE1_PE2, 0x03);
#else
        //LockPhyReg(pObj);
        tmpvalue = pObj->GetReg(reg, ZD_CR203);
        tmpvalue |= BIT_4;

        pObj->SetReg(reg, ZD_CR203, tmpvalue);
        ;
        //UnLockPhyReg(pObj);
#endif

        UnLockPhyReg(pObj);
}



void
HW_Set_Maxim_New_Chips2(zd_80211Obj_t *pObj, U32 ChannelNo, U8 InitChOnly)
{
        void *reg = pObj->reg;
        U32	tmpvalue;

        // Get Phy-Config permission
        LockPhyReg(pObj);

#ifdef HOST_IF_USB

        pObj->SetReg(reg, ZD_CR23, 0x40);
        pObj->SetReg(reg, ZD_CR15, 0x20);
        pObj->SetReg(reg, ZD_CR28, 0x3e);
        pObj->SetReg(reg, ZD_CR29, 0x00);
        pObj->SetReg(reg, ZD_CR26, 0x11);
        pObj->SetReg(reg, ZD_CR44, 0x33);
        pObj->SetReg(reg, ZD_CR106, 0x2a);
        pObj->SetReg(reg, ZD_CR107, 0x1a);
        pObj->SetReg(reg, ZD_CR109, 0x2b);
        pObj->SetReg(reg, ZD_CR110, 0x2b);
        pObj->SetReg(reg, ZD_CR111, 0x2b);
        pObj->SetReg(reg, ZD_CR112, 0x2b);
        pObj->SetReg(reg, ZD_CR10, 0x89);
        pObj->SetReg(reg, ZD_CR17, 0x20);
        pObj->SetReg(reg, ZD_CR26, 0x93);
        pObj->SetReg(reg, ZD_CR34, 0x30);
        pObj->SetReg(reg, ZD_CR35, 0x40);
        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR44, 0x32);
        pObj->SetReg(reg, ZD_CR46, 0x90);
        pObj->SetReg(reg, ZD_CR89, 0x18);
        pObj->SetReg(reg, ZD_CR92, 0x0a);
        pObj->SetReg(reg, ZD_CR101, 0x13);
        pObj->SetReg(reg, ZD_CR102, 0x27);
        pObj->SetReg(reg, ZD_CR106, 0x20);
        pObj->SetReg(reg, ZD_CR107, 0x24);
        pObj->SetReg(reg, ZD_CR109, 0x09);
        pObj->SetReg(reg, ZD_CR110, 0x13);
        pObj->SetReg(reg, ZD_CR111, 0x13);
        pObj->SetReg(reg, ZD_CR112, 0x13);
        pObj->SetReg(reg, ZD_CR113, 0x27);
        pObj->SetReg(reg, ZD_CR114, 0x27);
        pObj->SetReg(reg, ZD_CR115, 0x24);
        pObj->SetReg(reg, ZD_CR116, 0x24);

        pObj->SetReg(reg, ZD_CR117, 0xf4);
        pObj->SetReg(reg, ZD_CR118, 0xfa);
        pObj->SetReg(reg, ZD_CR120, 0x4f);

        pObj->SetReg(reg, ZD_CR121, 0x77);


        pObj->SetReg(reg, ZD_CR122, 0xfe);

#else

        pObj->SetReg(reg, ZD_CR23, 0x40);
        pObj->SetReg(reg, ZD_CR15, 0x20);
        pObj->SetReg(reg, ZD_CR28, 0x3e);
        pObj->SetReg(reg, ZD_CR29, 0x00);
        pObj->SetReg(reg, ZD_CR26, 0x11);
        pObj->SetReg(reg, ZD_CR44, 0x33);
        pObj->SetReg(reg, ZD_CR106, 0x2a);
        pObj->SetReg(reg, ZD_CR107, 0x1a);
        pObj->SetReg(reg, ZD_CR109, 0x2b);
        pObj->SetReg(reg, ZD_CR110, 0x2b);
        pObj->SetReg(reg, ZD_CR111, 0x2b);
        pObj->SetReg(reg, ZD_CR112, 0x2b);

#if (defined(GCCK) && defined(OFDM))

        pObj->SetReg(reg, ZD_CR10, 0x89);
        pObj->SetReg(reg, ZD_CR17, 0x20);
        pObj->SetReg(reg, ZD_CR26, 0x93);
        pObj->SetReg(reg, ZD_CR34, 0x30);
        pObj->SetReg(reg, ZD_CR35, 0x40);
        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR44, 0x32);

        pObj->SetReg(reg, ZD_CR46, 0x90);
        pObj->SetReg(reg, ZD_CR79, 0x58); //for Atheros compability 4415
        pObj->SetReg(reg, ZD_CR80, 0x30); //for Atheros compability
        pObj->SetReg(reg, ZD_CR81, 0x30); //for Atheros compability
        pObj->SetReg(reg, ZD_CR89, 0x18);







        pObj->SetReg(reg, ZD_CR92, 0x0a);
        pObj->SetReg(reg, ZD_CR101, 0x13);
        pObj->SetReg(reg, ZD_CR102, 0x27);
        pObj->SetReg(reg, ZD_CR106, 0x20);
        pObj->SetReg(reg, ZD_CR107, 0x24);
        pObj->SetReg(reg, ZD_CR109, 0x09);
        pObj->SetReg(reg, ZD_CR110, 0x13);
        pObj->SetReg(reg, ZD_CR111, 0x13);
        pObj->SetReg(reg, ZD_CR112, 0x13);
        pObj->SetReg(reg, ZD_CR113, 0x27);
        pObj->SetReg(reg, ZD_CR114, 0x27);
        pObj->SetReg(reg, ZD_CR115, 0x24);
        pObj->SetReg(reg, ZD_CR116, 0x24);
        pObj->SetReg(reg, ZD_CR117, 0xf4);
        //pObj->SetReg(reg, ZD_CR118, 0xfa);
        pObj->SetReg(reg, ZD_CR118, 0x00); //4326
        pObj->SetReg(reg, ZD_CR120, 0x4f);
        //pObj->SetReg(reg, ZD_CR121, 0x77); //3n12
        //pObj->SetReg(reg, ZD_CR121, 0x13); //3d24
        pObj->SetReg(reg, ZD_CR121, 0x06); //4326
        pObj->SetReg(reg, ZD_CR122, 0xfe);
#elif (defined(ECCK_60_5))

        pObj->SetReg(reg, ZD_CR47, 0x1E);
        pObj->SetReg(reg, ZD_CR106, 0x04);
        pObj->SetReg(reg, ZD_CR107, 0x00);
        pObj->SetReg(reg, ZD_CR14, 0x80);
        pObj->SetReg(reg, ZD_CR10, 0x89);

        pObj->SetReg(reg, ZD_CR11, 0x00);
        pObj->SetReg(reg, ZD_CR161, 0x28);
        pObj->SetReg(reg, ZD_CR162, 0x26);

        pObj->SetReg(reg, ZD_CR24, 0x0e);
        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR159, 0x93);
        pObj->SetReg(reg, ZD_CR160, 0xfc);
        pObj->SetReg(reg, ZD_CR161, 0x20);
        pObj->SetReg(reg, ZD_CR162, 0x26);
#endif
#endif

        pObj->CR122Flag = 2;
        pObj->CR31Flag = 2;

        //UnLockPhyReg(pObj);

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )

        pObj->SetReg(reg, ZD_PE1_PE2, 2);
#else
        //LockPhyReg(pObj);
        tmpvalue = pObj->GetReg(reg, ZD_CR203);
        tmpvalue &= ~BIT_4;
        pObj->SetReg(reg, ZD_CR203, tmpvalue);
        //UnLockPhyReg(pObj);
#endif

        HW_Set_IF_Synthesizer(pObj, M2827BF2[ChannelNo]);
        HW_Set_IF_Synthesizer(pObj, M2827BN2[ChannelNo]);
        HW_Set_IF_Synthesizer(pObj, 0x00400);
        HW_Set_IF_Synthesizer(pObj, 0x00ca1);
        HW_Set_IF_Synthesizer(pObj, 0x10072);
        HW_Set_IF_Synthesizer(pObj, 0x18645);
        HW_Set_IF_Synthesizer(pObj, 0x04006);
        HW_Set_IF_Synthesizer(pObj, 0x000a7);
        HW_Set_IF_Synthesizer(pObj, 0x08258);

        HW_Set_IF_Synthesizer(pObj, 0x03fc9);
        HW_Set_IF_Synthesizer(pObj, 0x0040a);
        HW_Set_IF_Synthesizer(pObj, 0x0000b);
        HW_Set_IF_Synthesizer(pObj, 0x0026c);
#if	defined(ECCK_60_5)

        HW_Set_IF_Synthesizer(pObj, 0x04258);
#endif

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )

        pObj->SetReg(reg, ZD_PE1_PE2, 3);