zdhw.c

ZYDAS zd1211b driver for Linux2.4

        }

        UnLockPhyReg(pObj);
        dbg_pline_1("\r\nPHY CR Registers Read/Write Test End");
        dbg_pline_1("\r\n");


#if 1
        // MAC Registers Read/Write Test
        dbg_pline_1("\r\nMAC Registers Read/Write Test Starting....");
        //to test 0x408, 0x410, 0x42c must set 0x418 to 0
        pObj->SetReg(reg, ZD_GPI_EN, 0);
        seed = pObj->GetReg(reg, ZD_TSF_LowPart);
        srand(seed);
        for (i=0; i<NUM_REG_MASK; i++) {
                tmpkey = (U32)rand();
                tmpkey |= (tmpkey << 16);
                tmpkey &= MacRegMaskTab[i].ReadWriteMask;

                if (MacRegMaskTab[i].Address == 0x42c) {
                        pObj->SetReg(reg, ZD_GPI_EN, 0);

                }



                pObj->SetReg(reg, MacRegMaskTab[i].Address, tmpkey);
                tmpvalue = pObj->GetReg(reg, MacRegMaskTab[i].Address);
                tmpvalue &= MacRegMaskTab[i].ReadWriteMask;
                if (tmpvalue != tmpkey) {
                        //printf("MAC %x Failed (Wr: %x, Rd: %x)\n", MacRegMaskTab[i].Address, tmpkey, tmpvalue);
                        dbg_plinew_1("\r\nMAC ", MacRegMaskTab[i].Address);
                        dbg_pline_1(" Failed ");
                        dbg_plinel_1("(Wr: ", tmpkey);
                        dbg_plinel_1(", Rd: ", tmpvalue);
                        dbg_pline_1(")");
                        ret = 2;
                }
                else {
                        //printf("MAC %x Success (Wr: %x, Rd: %x)\n", MacRegMaskTab[i].Address, tmpkey, tmpvalue);
                        dbg_plinew_1("\r\nMAC ", MacRegMaskTab[i].Address);
                        dbg_pline_1(" Success ");
                        dbg_plinel_1("(Wr: ", tmpkey);
                        dbg_plinel_1(", Rd: ", tmpvalue);
                        dbg_pline_1(")");
                }

        }
        dbg_pline_1("\r\nMAC Registers Read/Write Test End");
        dbg_pline_1("\r\n");
#endif

#if 0
        // EEPROM Read/Write Test
        dbg_pline_1("\r\nEEPROM Read/Write Testing...........");
        seed = pObj->GetReg(reg, ZD_TSF_LowPart);
        srand(seed);

        //for (tmpvalue=0; tmpvalue<1; tmpvalue++){
        {
                tmpkey = (U32)rand();
                tmpkey |= (tmpkey << 16);
                for (i=0; i<256; i++)
                {
                        //if (i == 1)
                        //tmpkey = 0x89;
                        pObj->SetReg(reg, ZD_E2P_SUBID+(i*4), tmpkey);
                }
                // Write to EEPROM
                pObj->SetReg(reg, ZD_EEPROM_PROTECT0, 0x55aa44bb);
                pObj->SetReg(reg, ZD_EEPROM_PROTECT1, 0x33cc22dd);
                pObj->SetReg(reg, ZD_ROMDIR, 0x422);

                // Sleep
                //for (i=0; i<1000; i++)
                //	pObj->DelayUs(5000);
                delay1ms(5);


                // Reset Registers
                for (i=0; i<256; i++)
                {
                        pObj->SetReg(reg, ZD_E2P_SUBID+(i*4), 0);
                }

                // Reload EEPROM
                pObj->SetReg(reg, ZD_ROMDIR, 0x424);

                // Sleep
                //for (i=0; i<1000; i++)
                //	pObj->DelayUs(5000);
                delay1ms(5);

                // Check if right
                for (i=0; i<256; i++)
                {
                        regvalue = pObj->GetReg(reg, ZD_E2P_SUBID+(i*4));
                        if (regvalue != tmpkey) {
                                //printf("EEPROM Addr (%x) error (Wr: %x, Rd: %x)\n", ZD_E2P_SUBID+(i*4), tmpkey, regvalue);
                                dbg_plinew_1("\r\nEEPROM Addr ", ZD_E2P_SUBID+(i*4));
                                dbg_pline_1(" error ");
                                dbg_plinel_1("(Wr: ", tmpkey);
                                dbg_plinel_1(",Rd: ", regvalue);
                                dbg_pline_1(")");
                                ret = 3;
                        }
                }
        }
#endif

        //dbg_pline_1("\r\nDigital Loopback Testing...........");

        dbg_pline_1("\r\nHW_HTP End");
        dbg_pline_1("\r\n");
        return 0;
}
#endif

#define SET_IF_SYNTHESIZER(macp, InputValue)       \
{                                                     \
	mFILL_WRITE_REGISTER( ZD_CR244, (U8) ((InputValue & 0xff0000)>>16));               \
	mFILL_WRITE_REGISTER( ZD_CR243, (U8) ((InputValue & 0xff00) >> 8));      \
	mFILL_WRITE_REGISTER( ZD_CR242, (U8) ((InputValue & 0xff)));   \
}
#define mFILL_WRITE_REGISTER(addr0, value0) \
{                                           \
    WriteAddr[WriteIndex] = addr0;          \
    WriteData[WriteIndex ++] = value0;      \
}


#ifndef HOST_IF_USB
void
HW_Set_IF_Synthesizer(zd_80211Obj_t *pObj, U32 InputValue)
{
        U32	S_bit_cnt;
        U32 tmpvalue;
        void *reg = pObj->reg;
        int i;


        S_bit_cnt = pObj->S_bit_cnt;

        InputValue = InputValue << (31 - S_bit_cnt);

#if !( (defined(OFDM) && defined(GCCK)) || defined(ECCK_60_5) )

        pObj->SetReg(reg, ZD_LE2, 0);
        pObj->SetReg(reg, ZD_RF_IF_CLK, 0);

        while(S_bit_cnt) {
                InputValue = InputValue << 1;
                if (InputValue & 0x80000000) {
                        pObj->SetReg(reg, ZD_RF_IF_DATA, 1);
                } else {
                        pObj->SetReg(reg, ZD_RF_IF_DATA, 0);
                }
                pObj->SetReg(reg, ZD_RF_IF_CLK, 1);
                //pObj->DelayUs(50);
                pObj->SetReg(reg, ZD_RF_IF_CLK, 0);

                //pObj->DelayUs(50);
                S_bit_cnt --;
        }

        pObj->SetReg(reg, ZD_LE2, 1);

        if (pObj->S_bit_cnt == 20) {			//Is it Intersil's chipset
                pObj->SetReg(reg, ZD_LE2, 0);
        }
        return;
#else

        LockPhyReg(pObj);
        tmpvalue = pObj->GetReg(reg, ZD_CR203);
        tmpvalue &= ~BIT_1;
        pObj->SetReg(reg, ZD_CR203, tmpvalue);

        tmpvalue = pObj->GetReg(reg, ZD_CR240);
        tmpvalue = 0x80;
        if (tmpvalue & BIT_7) {		// Configure RF by Software
                tmpvalue = pObj->GetReg(reg, ZD_CR203);
                tmpvalue &= ~BIT_2;
                pObj->SetReg(reg, ZD_CR203, tmpvalue);


                while(S_bit_cnt) {
                        InputValue = InputValue << 1;
                        if (InputValue & 0x80000000) {
                                tmpvalue = pObj->GetReg(reg, ZD_CR203);
                                tmpvalue |= BIT_3;
                                pObj->SetReg(reg, ZD_CR203, tmpvalue);
                        } else {
                                tmpvalue = pObj->GetReg(reg, ZD_CR203);
                                tmpvalue &= ~BIT_3;
                                pObj->SetReg(reg, ZD_CR203, tmpvalue);
                        }

                        tmpvalue = pObj->GetReg(reg, ZD_CR203);
                        tmpvalue |= BIT_2;
                        pObj->SetReg(reg, ZD_CR203, tmpvalue);

                        tmpvalue = pObj->GetReg(reg, ZD_CR203);

                        tmpvalue &= ~BIT_2;
                        pObj->SetReg(reg, ZD_CR203, tmpvalue);
                        S_bit_cnt --;
                }
        } else {		// Configure RF by Hardware
                // Make Bit-reverse to meet hardware requirement.
                tmpvalue = 0;
                for (i=0; i<S_bit_cnt; i++) {
                        InputValue = InputValue << 1;
                        if (InputValue & 0x80000000) {
                                tmpvalue |= (0x1 << i);
                        }
                }
                InputValue = tmpvalue;

                // Setup Command-Length
                // wait until command-queue is available
                tmpvalue = pObj->GetReg(reg, ZD_CR241);
                while(tmpvalue & BIT_0) {
                        pObj->DelayUs(1);
                        FPRINT("Command-Queue busy...");
                }

                // write command (from high-byte to low-byte)
                pObj->SetReg(reg, ZD_CR245, InputValue >> 24);
                pObj->SetReg(reg, ZD_CR244, InputValue >> 16);
                pObj->SetReg(reg, ZD_CR243, InputValue >> 8);
                pObj->SetReg(reg, ZD_CR242, InputValue);
        }


        tmpvalue = pObj->GetReg(reg, ZD_CR203);
        tmpvalue |= BIT_1;
        pObj->SetReg(reg, ZD_CR203, tmpvalue);

        if (pObj->S_bit_cnt == 20) {			//Is it Intersil's chipset
                tmpvalue = pObj->GetReg(reg, ZD_CR203);
                tmpvalue &= ~BIT_1;
                pObj->SetReg(reg, ZD_CR203, tmpvalue);
        }

        UnLockPhyReg(pObj);
        return;
#endif
}
#endif


void
LockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet

        void *reg = pObj->reg;
        U32	tmpvalue;

        tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
        tmpvalue &= ~0x80;
        pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif
}


void
UnLockPhyReg(zd_80211Obj_t *pObj)
{
#ifndef fQuickPhySet
        void *reg = pObj->reg;
        U32	tmpvalue;

        tmpvalue = pObj->GetReg(reg, ZD_CtlReg1);
        tmpvalue |= 0x80;
        pObj->SetReg(reg, ZD_CtlReg1, tmpvalue);
#endif
}


void
HW_Set_Maxim_New_Chips(zd_80211Obj_t *pObj, U32 ChannelNo, U8 InitChOnly)
{
        void *reg = pObj->reg;
        U32 tmpvalue;

        LockPhyReg(pObj);

#ifdef HOST_IF_USB

        pObj->SetReg(reg, ZD_CR23, 0x40);
        pObj->SetReg(reg, ZD_CR15, 0x20);
        pObj->SetReg(reg, ZD_CR28, 0x3e);
        pObj->SetReg(reg, ZD_CR29, 0x00);
        pObj->SetReg(reg, ZD_CR26, 0x11);
        pObj->SetReg(reg, ZD_CR44, 0x33);
        pObj->SetReg(reg, ZD_CR106, 0x2a);
        pObj->SetReg(reg, ZD_CR107, 0x1a);

        pObj->SetReg(reg, ZD_CR109, 0x2b);
        pObj->SetReg(reg, ZD_CR110, 0x2b);
        pObj->SetReg(reg, ZD_CR111, 0x2b);
        pObj->SetReg(reg, ZD_CR112, 0x2b);
        pObj->SetReg(reg, ZD_CR10, 0x89);
        pObj->SetReg(reg, ZD_CR17, 0x20);
        pObj->SetReg(reg, ZD_CR26, 0x93);
        pObj->SetReg(reg, ZD_CR34, 0x30);
        pObj->SetReg(reg, ZD_CR35, 0x40);
        pObj->SetReg(reg, ZD_CR41, 0x24);
        pObj->SetReg(reg, ZD_CR44, 0x32);
        pObj->SetReg(reg, ZD_CR46, 0x90);
        pObj->SetReg(reg, ZD_CR89, 0x18);
        pObj->SetReg(reg, ZD_CR92, 0x0a);

        pObj->SetReg(reg, ZD_CR101, 0x13);