mappy.io

一个不出名的GBA模拟器

0:Sample 13 (4 bits)
12:Sample 14 (4 bits)
8:Sample 15 (4 bits)

reg=WAVE_RAM2_L
help=sdk/sound.html#reg98
addr=$98
name=GBC Channel 3 Waveform RAM (sample 16..19)
mode=R/W
4:Sample 16 (4 bits)
0:Sample 17 (4 bits)
12:Sample 18 (4 bits)
8:Sample 19 (4 bits)

reg=WAVE_RAM2_H
help=sdk/sound.html#reg9A
addr=$9A
name=GBC Channel 3 Waveform RAM (sample 20..23)
mode=R/W
4:Sample 20 (4 bits)
0:Sample 21 (4 bits)
12:Sample 22 (4 bits)
8:Sample 23 (4 bits)

reg=WAVE_RAM3_L
help=sdk/sound.html#reg9C
addr=$9C
name=GBC Channel 3 Waveform RAM (sample 24..27)
mode=R/W
4:Sample 24 (4 bits)
0:Sample 25 (4 bits)
12:Sample 26 (4 bits)
8:Sample 27 (4 bits)

reg=WAVE_RAM3_H
help=sdk/sound.html#reg9E
addr=$9E
name=GBC Channel 3 Waveform RAM (sample 28..31)
mode=R/W
4:Sample 28 (4 bits)
0:Sample 29 (4 bits)
12:Sample 30 (4 bits)
8:Sample 31 (4 bits)

reg=FIFOA_L
help=sdk/sound.html#regA0
addr=$0A0
name=DirectSound A FIFO Data (sample 0,1)
mode=W
0:Data 0 (8 bits)
8:Data 1 (8 bits)

reg=FIFOA_H
help=sdk/sound.html#regA2
addr=$0A2
name=DirectSound A FIFO Data (sample 2,3)
mode=W
0:Data 2 (8 bits)
8:Data 3 (8 bits)

reg=FIFOB_L
help=sdk/sound.html#regA4
addr=$0A4
name=DirectSound B FIFO Data (sample 0,1)
mode=W
0:Data 0 (8 bits)
8:Data 1 (8 bits)

reg=FIFOB_H
help=sdk/sound.html#regA6
addr=$0A6
name=DirectSound B FIFO Data (sample 2,3)
mode=W
0:Data 2 (8 bits)
8:Data 3 (8 bits)

reg=DMA0_SRC_L
alt=DMA0SAD_L
help=sdk/dma.html
addr=$0B0
name=DMA Channel 0 Source Address (low)
mode=W
0:Source Address (low 16 bits)

reg=DMA0_SRC_H
alt=DMA0SAD_H
help=sdk/dma.html
addr=$0B2
name=DMA Channel 0 Source Address (high)
mode=W
0:Source Address (high 11 bits)

reg=DMA0_DEST_L
alt=DMA0DAD_L
help=sdk/dma.html
addr=$0B4
name=DMA Channel 0 Dest. Address (low)
mode=W
0:Destination Address (low 16 bits)

reg=DMA0_DEST_H
alt=DMA0DAD_H
help=sdk/dma.html
addr=$0B6
name=DMA Channel 0 Dest. Address (high)
mode=W
0:Destination Address (high 11 bits)

reg=DMA0_SIZE
alt=DMA0CNT_L
help=sdk/dma.html
addr=$0B8
name=DMA Channel 0 Transfer Size
mode=W
0:Transfer Length (14 bits)

reg=DMA0_CR
alt=DMA0CNT_H
help=sdk/dma.html
addr=$0BA
name=DMA Channel 0 Control Register
mode=R/W
5:Dest. Mode (2 bits)
7:Source Mode (2 bits)
9:?
10:Width (0=HW, 1=word)
11:?
12:Start time (2 bits)
14:IRQ
15:Enabled

reg=DMA1_SRC_L
alt=DMA1SAD_L
help=sdk/dma.html
addr=$0BC
name=DMA Channel 1 Source Address (low)
mode=W
0:Source Address (low 16 bits)

reg=DMA1_SRC_H
alt=DMA1SAD_H
help=sdk/dma.html
addr=$0BE
name=DMA Channel 1 Source Address (high)
mode=W
0:Source Address (high 12 bits)

reg=DMA1_DEST_L
alt=DMA1DAD_L
help=sdk/dma.html
addr=$0C0
name=DMA Channel 1 Dest. Address (low)
mode=W
0:Destination Address (low 16 bits)

reg=DMA1_DEST_H
alt=DMA1DAD_H
help=sdk/dma.html
addr=$0C2
name=DMA Channel 1 Dest. Address (high)
mode=W
0:Destination Address (high 11 bits)

reg=DMA1_SIZE
alt=DMA1CNT_L
help=sdk/dma.html
addr=$0C4
name=DMA Channel 1 Transfer Size
mode=W
0:Transfer Length (14 bits)

reg=DMA1_CR
alt=DMA1CNT_H
help=sdk/dma.html
addr=$0C6
name=DMA Channel 1 Control Register
mode=R/W
5:Dest. Mode (2 bits)
7:Source Mode (2 bits)
9:?
10:Width (0=HW, 1=word)
11:?
12:Start time (2 bits)
14:IRQ
15:Enabled

reg=DMA2_SRC_L
alt=DMA2SAD_L
help=sdk/dma.html
addr=$0C8
name=DMA Channel 2 Source Address (low)
mode=W
0:Source Address (low 16 bits)

reg=DMA2_SRC_H
alt=DMA2SAD_H
help=sdk/dma.html
addr=$0CA
name=DMA Channel 2 Source Address (high)
mode=W
0:Source Address (high 12 bits)

reg=DMA2_DEST_L
alt=DMA2DAD_L
help=sdk/dma.html
addr=$0CC
name=DMA Channel 2 Dest. Address (low)
mode=W
0:Destination Address (low 16 bits)

reg=DMA2_DEST_H
alt=DMA2DAD_H
help=sdk/dma.html
addr=$0CE
name=DMA Channel 2 Dest. Address (high)
mode=W
0:Destination Address (high 11 bits)

reg=DMA2_SIZE
alt=DMA2CNT_L
help=sdk/dma.html
addr=$0D0
name=DMA Channel 2 Transfer Size
mode=W
0:Transfer Length (14 bits)

reg=DMA2_CR
alt=DMA2CNT_H
help=sdk/dma.html
addr=$0D2
name=DMA Channel 2 Control Register
mode=R/W
5:Dest. Mode (2 bits)
7:Source Mode (2 bits)
9:?
10:Width (0=HW, 1=word)
11:?
12:Start time (2 bits)
14:IRQ
15:Enabled

reg=DMA3_SRC_L
alt=DMA3SAD_L
help=sdk/dma.html
addr=$0D4
name=DMA Channel 3 Source Address (low)
mode=W
0:Source Address (low 16 bits)

reg=DMA3_SRC_H
alt=DMA3SAD_H
help=sdk/dma.html
addr=$0D6
name=DMA Channel 3 Source Address (high)
mode=W
0:Source Address (high 12 bits)

reg=DMA3_DEST_L
alt=DMA3DAD_L
help=sdk/dma.html
addr=$0D8
name=DMA Channel 3 Dest. Address (low)
mode=W
0:Destination Address (low 16 bits)

reg=DMA3_DEST_H
alt=DMA3DAD_H
help=sdk/dma.html
addr=$0DA
name=DMA Channel 3 Dest. Address (high)
mode=W
0:Destination Address (high 12 bits)

reg=DMA3_SIZE
alt=DMA3CNT_L
help=sdk/dma.html
addr=$0DC
name=DMA Channel 3 Transfer Size
mode=W
0:Transfer Length (16 bits)

reg=DMA3_CR
alt=DMA3CNT_H
help=sdk/dma.html
addr=$0DE
name=DMA Channel 3 Control Register
mode=R/W
5:Dest. Mode (2 bits)
7:Source Mode (2 bits)
9:?
10:Width (0=HW, 1=word)
11:?
12:Start time (2 bits)
14:IRQ
15:Enabled

reg=TIMER0_DATA
alt=TM0D
help=sdk/timers.html
addr=$100
name=Timer 0 Value
mode=W
0:Value (16 bits)

reg=TIMER0_CR
alt=TM0CNT
help=sdk/timers.html
addr=$102
name=Timer 0 Control Register
mode=R/W
0:Frequency (2 bits)
2:Cascade
6:IRQ
7:Enabled

reg=TIMER1_DATA
alt=TM1D
help=sdk/timers.html
addr=$104
name=Timer 1 Value
mode=W
0:Value (16 bits)

reg=TIMER1_CR
alt=TM1CNT
help=sdk/timers.html
addr=$106
name=Timer 1 Control Register
mode=R/W
0:Frequency (2 bits)
2:Cascade
6:IRQ
7:Enabled

reg=TIMER2_DATA
alt=TM2D
help=sdk/timers.html
addr=$108
name=Timer 2 Value
mode=W
0:Value (16 bits)

reg=TIMER2_CR
alt=TM2CNT
help=sdk/timers.html
addr=$10A
name=Timer 2 Control Register
mode=R/W
0:Frequency (2 bits)
2:Cascade
6:IRQ
7:Enabled

reg=TIMER3_DATA
alt=TM3D
help=sdk/timers.html
addr=$10C
name=Timer 3 Value
mode=W
0:Value (16 bits)

reg=TIMER3_CR
alt=TM3CNT
help=sdk/timers.html
addr=$10E
name=Timer 3 Control Register
mode=R/W
0:Frequency (2 bits)
2:Cascade
6:IRQ
7:Enabled

reg=SIOMULTI0
addr=$0120
help=sdk/networking.html
mode=R/W
name=Multi-player Comms Data 0
0:16 bits of data

reg=SIOMULTI1
addr=$0122
help=sdk/networking.html
mode=R/W
name=Multi-player Comms Data 1
0:16 bits of data

reg=SIOMULTI2
addr=$0124
help=sdk/networking.html
mode=R/W
name=Multi-player Comms Data 2
0:16 bits of data

reg=SIOMULTI3
addr=$0126
help=sdk/networking.html
mode=R/W
name=Multi-player Comms Data 3
0:16 bits of data

reg=SIOCNT
addr=$0128
help=sdk/networking.html
mode=R/W
name=?
0:?

reg=SIOMLT_SEND
addr=$012A
help=sdk/networking.html
mode=R/W
name=?
0:?

reg=KEYS
alt=KEYINPUT
help=sdk/joypad.html
addr=$130
name=Joypad status
mode=R/W
0:A released
1:B released
2:Select released
3:Start released
4:Right released
5:Left released
6:Up released
7:Down released
8:R shoulder released
9:L shoulder released

reg=KEYS_CR
alt=KEYCNT
help=sdk/joypad.html
addr=$0132
mode=R/W
name=Joypad Control Register
0:A
1:B
2:Select
3:Start
4:R
5:L
6:Up
7:Down
8:R shoulder
9:L shoulder
10:not used (start)
13:not used (end)
14:Interrupt Enable
15:For the keys whose interrupt bits are set: 0 any key triggers interrupt. 1 all keys pressed triggers interrupt.

reg=RCNT
help=sdk/networking.html
addr=$0134
mode=R/W
name=Communication Function Register
0:? SC (Data Bit)
1:? SD (Data Bit)
2:? SI (Data Bit)
3:? SO (Data Bit)
4:? SC (Input/Output Select)
5:? SD (Input/Output Select)
6:? SI (Input/Output Select)
7:? SO (Input/Output Select)
8:? Interrupt Enable
9:not used (start)
13:not used (end)
14:Communication Function Select
15:<cont>

reg=JOYCNT
help=sdk/networking.html
addr=$0140
mode=R/W
name=Joy Bus Communication Control
0:Device Reset Signal Recieve Flag
1:Recieve Complete Flag
2:Send Complete Flag
3:not used (start)
5:not used (end)
6:Interrupt Request enable Flag
7:not used (start)
15:not used (end)

reg=JOY_RECV_L
help=sdk/networking.html
addr=$0150
mode=R/W
name=Joy Bus Recieve Data Low
0:Low 16 bits

reg=JOY_RECV_H
help=sdk/networking.html
addr=$0152
mode=R/W
name=Joy Bus Recieve Data High
0:High 16 bits

reg=JOYTRANS_L
help=sdk/networking.html
addr=$0154
mode=R/W
name=Joy Bus Send Data Low
0:Low 16 bits

reg=JOYTRANS_H
help=sdk/networking.html
addr=$0156
mode=R/W
name=Joy BUS Send DATA High
0:High 16 bits
                                
reg=JOYSTAT
help=sdk/networking.html
addr=$0158
mode=R/W
name=Recieve Status Register
0:not used
1:Recieve Status Flag
2:not used
3:Send Status Flag

reg=IE
help=sdk/interrupts.html
addr=$200
name=Master Interrupt Enable
mode=R/W
0:V Blank IRQ enabled
1:H Blank IRQ enabled
2:Y trigger IRQ enabled
3:Timer 0 IRQ enabled
4:Timer 1 IRQ enabled
5:Timer 2 IRQ enabled
6:Timer 3 IRQ enabled
7:Comms IRQ enabled
8:DMA 0 IRQ enabled
9:DMA 1 IRQ enabled
10:DMA 2 IRQ enabled
11:DMA 3 IRQ enabled
12:Keypad IRQ enabled
13:Cart IRQ enabled

reg=IF
help=sdk/interrupts.html
addr=$202
name=Interrupt Flags
mode=R/W
0:V Blank IRQ occured
1:H Blank IRQ occured
2:Y trigger IRQ occured
3:Timer 0 IRQ occured
4:Timer 1 IRQ occured
5:Timer 2 IRQ occured
6:Timer 3 IRQ occured
7:Comms IRQ occured
8:DMA 0 IRQ occured
9:DMA 1 IRQ occured
10:DMA 2 IRQ occured
11:DMA 3 IRQ occured
12:Keypad IRQ occured
13:Cart IRQ occured

reg=WS_CR
alt=WAITCNT
help=sdk/memory.html#reg204
addr=$204
name=Wait state control
mode=R/W
0:SRAM wait mode (2 bits)
2:Bank 0 mode (3 bits)
5:Bank 1 mode (3 bits)
8:Bank 2 mode (3 bits)
11:Cartridge PHI Frequency (2 bits)
14:Prefetch
15:Cartridge Type%

reg=IME
help=sdk/interrupts.html
addr=$208
name=Interrupt Master Enable
mode=R/W
0:IRQ master enable
1:%
2:%
3:%
4:%
5:%
6:%
7:%
8:%
9:%
10:%
11:%
12:%
13:%
14:%
15:%

reg=PAUSE
addr=$0300
mode=R/W
0:unknown fixme
1:%
2:%
3:%
4:%
5:%
6:%
7:%
8:%
9:%
10:%
11:%
12:%
13:%
14:%
15:fixme