emu10k1_main.c

linux2.6.16版本

	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {

		/* Set up the value */
		data = ((value & 0x1) ? PULSEN_BIT : 0);
		value >>= 1;

		outl(hc_value | data, hc_port);

		/* Clock the shift register */
		outl(hc_value | data | HANDN_BIT, hc_port);
		outl(hc_value | data, hc_port);
	}

	/* Latch the bits */
	outl(hc_value | HOOKN_BIT, hc_port);
	outl(hc_value, hc_port);
}

/**************************************************************************
 * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 * trim value consists of a 16bit value which is composed of two
 * 8 bit gain/trim values, one for the left channel and one for the
 * right channel.  The following table maps from the Gain/Attenuation
 * value in decibels into the corresponding bit pattern for a single
 * channel.
 */

static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
					 unsigned short gain)
{
	unsigned int bit;

	/* Enable writing to the TRIM registers */
	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);

	/* Do it again to insure that we meet hold time requirements */
	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);

	for (bit = (1 << 15); bit; bit >>= 1) {
		unsigned int value;
		
		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);

		if (gain & bit)
			value |= EC_TRIM_SDATA;

		/* Clock the bit */
		snd_emu10k1_ecard_write(emu, value);
		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
		snd_emu10k1_ecard_write(emu, value);
	}

	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
}

static int __devinit snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
{
	unsigned int hc_value;

	/* Set up the initial settings */
	emu->ecard_ctrl = EC_RAW_RUN_MODE |
			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);

	/* Step 0: Set the codec type in the hardware control register 
	 * and enable audio output */
	hc_value = inl(emu->port + HCFG);
	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
	inl(emu->port + HCFG);

	/* Step 1: Turn off the led and deassert TRIM_CS */
	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);

	/* Step 2: Calibrate the ADC and DAC */
	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);

	/* Step 3: Wait for awhile;   XXX We can't get away with this
	 * under a real operating system; we'll need to block and wait that
	 * way. */
	snd_emu10k1_wait(emu, 48000);

	/* Step 4: Switch off the DAC and ADC calibration.  Note
	 * That ADC_CAL is actually an inverted signal, so we assert
	 * it here to stop calibration.  */
	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);

	/* Step 4: Switch into run mode */
	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);

	/* Step 5: Set the analog input gain */
	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);

	return 0;
}

static int __devinit snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
{
	unsigned long special_port;
	unsigned int value;

	/* Special initialisation routine
	 * before the rest of the IO-Ports become active.
	 */
	special_port = emu->port + 0x38;
	value = inl(special_port);
	outl(0x00d00000, special_port);
	value = inl(special_port);
	outl(0x00d00001, special_port);
	value = inl(special_port);
	outl(0x00d0005f, special_port);
	value = inl(special_port);
	outl(0x00d0007f, special_port);
	value = inl(special_port);
	outl(0x0090007f, special_port);
	value = inl(special_port);

	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
	return 0;
}

static int snd_emu1212m_fpga_write(struct snd_emu10k1 * emu, int reg, int value)
{
	if (reg<0 || reg>0x3f)
		return 1;
	reg+=0x40; /* 0x40 upwards are registers. */
	if (value<0 || value>0x3f) /* 0 to 0x3f are values */
		return 1;
	outl(reg, emu->port + A_IOCFG);
	outl(reg | 0x80, emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */
	outl(value, emu->port + A_IOCFG);
	outl(value | 0x80 , emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */

	return 0;
}

static int snd_emu1212m_fpga_read(struct snd_emu10k1 * emu, int reg, int *value)
{
	if (reg<0 || reg>0x3f)
		return 1;
	reg+=0x40; /* 0x40 upwards are registers. */
	outl(reg, emu->port + A_IOCFG);
	outl(reg | 0x80, emu->port + A_IOCFG);  /* High bit clocks the value into the fpga. */
	*value = inl(emu->port + A_IOCFG);

	return 0;
}

static int snd_emu1212m_fpga_netlist_write(struct snd_emu10k1 * emu, int reg, int value)
{
	snd_emu1212m_fpga_write(emu, 0x00, ((reg >> 8) & 0x3f) );
	snd_emu1212m_fpga_write(emu, 0x01, (reg & 0x3f) );
	snd_emu1212m_fpga_write(emu, 0x02, ((value >> 8) & 0x3f) );
	snd_emu1212m_fpga_write(emu, 0x03, (value & 0x3f) );

	return 0;
}

static int __devinit snd_emu10k1_emu1212m_init(struct snd_emu10k1 * emu)
{
	unsigned int i;
	int tmp;

	snd_printk(KERN_ERR "emu1212m: Special config.\n");
	outl(0x0005a00c, emu->port + HCFG);
	outl(0x0005a004, emu->port + HCFG);
	outl(0x0005a000, emu->port + HCFG);
	outl(0x0005a000, emu->port + HCFG);

	snd_emu1212m_fpga_read(emu, 0x22, &tmp );
	snd_emu1212m_fpga_read(emu, 0x23, &tmp );
	snd_emu1212m_fpga_read(emu, 0x24, &tmp );
	snd_emu1212m_fpga_write(emu, 0x04, 0x01 );
	snd_emu1212m_fpga_read(emu, 0x0b, &tmp );
	snd_emu1212m_fpga_write(emu, 0x0b, 0x01 );
	snd_emu1212m_fpga_read(emu, 0x10, &tmp );
	snd_emu1212m_fpga_write(emu, 0x10, 0x00 );
	snd_emu1212m_fpga_read(emu, 0x11, &tmp );
	snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
	snd_emu1212m_fpga_read(emu, 0x13, &tmp );
	snd_emu1212m_fpga_write(emu, 0x13, 0x0f );
	snd_emu1212m_fpga_read(emu, 0x11, &tmp );
	snd_emu1212m_fpga_write(emu, 0x11, 0x30 );
	snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
	snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );
	snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
	snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
	snd_emu1212m_fpga_write(emu, 0x09, 0x0f );
	snd_emu1212m_fpga_write(emu, 0x06, 0x00 );
	snd_emu1212m_fpga_write(emu, 0x05, 0x00 );
	snd_emu1212m_fpga_write(emu, 0x0e, 0x12 );
	snd_emu1212m_fpga_netlist_write(emu, 0x0000, 0x0200);
	snd_emu1212m_fpga_netlist_write(emu, 0x0001, 0x0201);
	snd_emu1212m_fpga_netlist_write(emu, 0x0002, 0x0500);
	snd_emu1212m_fpga_netlist_write(emu, 0x0003, 0x0501);
	snd_emu1212m_fpga_netlist_write(emu, 0x0004, 0x0400);
	snd_emu1212m_fpga_netlist_write(emu, 0x0005, 0x0401);
	snd_emu1212m_fpga_netlist_write(emu, 0x0006, 0x0402);
	snd_emu1212m_fpga_netlist_write(emu, 0x0007, 0x0403);
	snd_emu1212m_fpga_netlist_write(emu, 0x0008, 0x0404);
	snd_emu1212m_fpga_netlist_write(emu, 0x0009, 0x0405);
	snd_emu1212m_fpga_netlist_write(emu, 0x000a, 0x0406);
	snd_emu1212m_fpga_netlist_write(emu, 0x000b, 0x0407);
	snd_emu1212m_fpga_netlist_write(emu, 0x000c, 0x0100);
	snd_emu1212m_fpga_netlist_write(emu, 0x000d, 0x0104);
	snd_emu1212m_fpga_netlist_write(emu, 0x000e, 0x0200);
	snd_emu1212m_fpga_netlist_write(emu, 0x000f, 0x0201);
	for (i=0;i < 0x20;i++) {
		snd_emu1212m_fpga_netlist_write(emu, 0x0100+i, 0x0000);
	}
	for (i=0;i < 4;i++) {
		snd_emu1212m_fpga_netlist_write(emu, 0x0200+i, 0x0000);
	}
	for (i=0;i < 7;i++) {
		snd_emu1212m_fpga_netlist_write(emu, 0x0300+i, 0x0000);
	}
	for (i=0;i < 7;i++) {
		snd_emu1212m_fpga_netlist_write(emu, 0x0400+i, 0x0000);
	}
	snd_emu1212m_fpga_netlist_write(emu, 0x0500, 0x0108);
	snd_emu1212m_fpga_netlist_write(emu, 0x0501, 0x010c);
	snd_emu1212m_fpga_netlist_write(emu, 0x0600, 0x0110);
	snd_emu1212m_fpga_netlist_write(emu, 0x0601, 0x0114);
	snd_emu1212m_fpga_netlist_write(emu, 0x0700, 0x0118);
	snd_emu1212m_fpga_netlist_write(emu, 0x0701, 0x011c);
	snd_emu1212m_fpga_write(emu, 0x07, 0x01 );

	snd_emu1212m_fpga_read(emu, 0x21, &tmp );

	outl(0x0000a000, emu->port + HCFG);
	outl(0x0000a001, emu->port + HCFG);
	/* Initial boot complete. Now patches */

	snd_emu1212m_fpga_read(emu, 0x21, &tmp );
	snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
	snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
	snd_emu1212m_fpga_write(emu, 0x0c, 0x19 );
	snd_emu1212m_fpga_write(emu, 0x12, 0x0c );
	snd_emu1212m_fpga_read(emu, 0x0a, &tmp );
	snd_emu1212m_fpga_write(emu, 0x0a, 0x10 );

	snd_emu1212m_fpga_read(emu, 0x20, &tmp );
	snd_emu1212m_fpga_read(emu, 0x21, &tmp );

	snd_emu1212m_fpga_netlist_write(emu, 0x0300, 0x0312);
	snd_emu1212m_fpga_netlist_write(emu, 0x0301, 0x0313);
	snd_emu1212m_fpga_netlist_write(emu, 0x0200, 0x0302);
	snd_emu1212m_fpga_netlist_write(emu, 0x0201, 0x0303);

	return 0;
}
/*
 *  Create the EMU10K1 instance
 */

#ifdef CONFIG_PM
static int alloc_pm_buffer(struct snd_emu10k1 *emu);
static void free_pm_buffer(struct snd_emu10k1 *emu);
#endif

static int snd_emu10k1_free(struct snd_emu10k1 *emu)
{
	if (emu->port) {	/* avoid access to already used hardware */
	       	snd_emu10k1_fx8010_tram_setup(emu, 0);
		snd_emu10k1_done(emu);
		/* remove reserved page */
		if (emu->reserved_page) {
			snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
			emu->reserved_page = NULL;
		}
		snd_emu10k1_free_efx(emu);
       	}
	if (emu->memhdr)
		snd_util_memhdr_free(emu->memhdr);
	if (emu->silent_page.area)
		snd_dma_free_pages(&emu->silent_page);
	if (emu->ptb_pages.area)
		snd_dma_free_pages(&emu->ptb_pages);
	vfree(emu->page_ptr_table);
	vfree(emu->page_addr_table);
#ifdef CONFIG_PM
	free_pm_buffer(emu);
#endif
	if (emu->irq >= 0)
		free_irq(emu->irq, (void *)emu);
	if (emu->port)
		pci_release_regions(emu->pci);
	if (emu->card_capabilities->ca0151_chip) /* P16V */	
		snd_p16v_free(emu);
	pci_disable_device(emu->pci);
	kfree(emu);
	return 0;
}

static int snd_emu10k1_dev_free(struct snd_device *device)
{
	struct snd_emu10k1 *emu = device->device_data;
	return snd_emu10k1_free(emu);
}

static struct snd_emu_chip_details emu_chip_details[] = {
	/* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
	/* Tested by [e-mail] 3rd July 2005 */
	/* DSP: CA0108-IAT
	 * DAC: CS4382-KQ
	 * ADC: Philips 1361T
	 * AC97: STAC9750
	 * CA0151: None
	 */
	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
	 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0108_chip = 1,
	 .spk71 = 1,
	 .ac97_chip = 1} ,
	/* Audigy 2 ZS Notebook Cardbus card.*/
	/* Tested by [e-mail] 22th December 2005 */
	/* Audio output 7.1/Headphones working.
	 * Digital output working. (AC3 not checked, only PCM)
	 * Audio inputs not tested.
	 */ 
	/* DSP: Tiny2
	 * DAC: Wolfson WM8768/WM8568
	 * ADC: Wolfson WM8775
	 * AC97: None
	 * CA0151: None
	 */
	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
	 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0108_chip = 1,
	 .ca_cardbus_chip = 1,
	 .spi_dac = 1,
	 .spk71 = 1} ,
	{.vendor = 0x1102, .device = 0x0008, 
	 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0108_chip = 1,
	 .ac97_chip = 1} ,
	/* Tested by [e-mail] 8th July 2005. No sound available yet. */
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
	 .driver = "Audigy2", .name = "E-mu 1212m [4001]", 
	 .id = "EMU1212m",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .emu1212m = 1} ,
	/* Tested by [e-mail] 3rd July 2005 */
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
	 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	/* Tested by [e-mail] 5th Nov 2005 */
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
	 .driver = "Audigy2", .name = "Audigy 2 [2006]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
	 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
	 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	/* Audigy 2 */
	/* Tested by [e-mail] 3rd July 2005 */
	/* DSP: CA0102-IAT
	 * DAC: CS4382-KQ
	 * ADC: Philips 1361T
	 * AC97: STAC9721
	 * CA0151: Yes
	 */
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
	 .driver = "Audigy2", .name = "Audigy 2 [SB0240]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
	 .driver = "Audigy2", .name = "Audigy 2 EX [1005]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
	 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]", 
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spk71 = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
	 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
	 .id = "Audigy2",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ca0151_chip = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
	 .driver = "Audigy", .name = "Audigy 1 [SB0090]", 
	 .id = "Audigy",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
	 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]", 
	 .id = "Audigy",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .spdif_bug = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
	 .driver = "Audigy", .name = "Audigy 1 [SB0090]", 
	 .id = "Audigy",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0004,
	 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 
	 .id = "Audigy",
	 .emu10k2_chip = 1,
	 .ca0102_chip = 1,
	 .ac97_chip = 1} ,
	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
	 .driver = "EMU10K1", .name = "SBLive! [SB0105]", 
	 .id = "Live",
	 .emu10k1_chip = 1,
	 .ac97_chip = 1,
	 .sblive51 = 1} ,
	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
	 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]", 
	 .id = "Live",
	 .emu10k1_chip = 1,
	 .ac97_chip = 1,
	 .sblive51 = 1} ,
	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
	 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]", 
	 .id = "Live",
	 .emu10k1_chip = 1,
	 .ac97_chip = 1,
	 .sblive51 = 1} ,
	/* Tested by ALSA bug#1680 26th December 2005 */
	/* note: It really has SB0220 written on the card. */
	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,