cx24123.c

linux2.6.16版本

/*
    Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver

    Copyright (C) 2005 Steven Toth <[e-mail]>

    Support for KWorld DVB-S 100 by Vadim Catana <[e-mail]>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>

#include "dvb_frontend.h"
#include "cx24123.h"

static int debug;
#define dprintk(args...) \
	do { \
		if (debug) printk (KERN_DEBUG "cx24123: " args); \
	} while (0)

struct cx24123_state
{
	struct i2c_adapter* i2c;
	struct dvb_frontend_ops ops;
	const struct cx24123_config* config;

	struct dvb_frontend frontend;

	u32 lastber;
	u16 snr;
	u8  lnbreg;

	/* Some PLL specifics for tuning */
	u32 VCAarg;
	u32 VGAarg;
	u32 bandselectarg;
	u32 pllarg;

	/* The Demod/Tuner can't easily provide these, we cache them */
	u32 currentfreq;
	u32 currentsymbolrate;
};

/* Various tuner defaults need to be established for a given symbol rate Sps */
static struct
{
	u32 symbolrate_low;
	u32 symbolrate_high;
	u32 VCAslope;
	u32 VCAoffset;
	u32 VGA1offset;
	u32 VGA2offset;
	u32 VCAprogdata;
	u32 VGAprogdata;
} cx24123_AGC_vals[] =
{
	{
		.symbolrate_low		= 1000000,
		.symbolrate_high	= 4999999,
		.VCAslope		= 0x07,
		.VCAoffset		= 0x0f,
		.VGA1offset		= 0x1f8,
		.VGA2offset		= 0x1f8,
		.VGAprogdata		= (2 << 18) | (0x1f8 << 9) | 0x1f8,
		.VCAprogdata		= (4 << 18) | (0x07 << 9) | 0x07,
	},
	{
		.symbolrate_low		=  5000000,
		.symbolrate_high	= 14999999,
		.VCAslope		= 0x1f,
		.VCAoffset		= 0x1f,
		.VGA1offset		= 0x1e0,
		.VGA2offset		= 0x180,
		.VGAprogdata		= (2 << 18) | (0x180 << 9) | 0x1e0,
		.VCAprogdata		= (4 << 18) | (0x07 << 9) | 0x1f,
	},
	{
		.symbolrate_low		= 15000000,
		.symbolrate_high	= 45000000,
		.VCAslope		= 0x3f,
		.VCAoffset		= 0x3f,
		.VGA1offset		= 0x180,
		.VGA2offset		= 0x100,
		.VGAprogdata		= (2 << 18) | (0x100 << 9) | 0x180,
		.VCAprogdata		= (4 << 18) | (0x07 << 9) | 0x3f,
	},
};

/*
 * Various tuner defaults need to be established for a given frequency kHz.
 * fixme: The bounds on the bands do not match the doc in real life.
 * fixme: Some of them have been moved, other might need adjustment.
 */
static struct
{
	u32 freq_low;
	u32 freq_high;
	u32 bandselect;
	u32 VCOdivider;
	u32 VCOnumber;
	u32 progdata;
} cx24123_bandselect_vals[] =
{
	{
		.freq_low	= 950000,
		.freq_high	= 1018999,
		.bandselect	= 0x40,
		.VCOdivider	= 4,
		.VCOnumber	= 7,
		.progdata	= (0 << 18) | (0 << 9) | 0x40,
	},
	{
		.freq_low	= 1019000,
		.freq_high	= 1074999,
		.bandselect	= 0x80,
		.VCOdivider	= 4,
		.VCOnumber	= 8,
		.progdata	= (0 << 18) | (0 << 9) | 0x80,
	},
	{
		.freq_low	= 1075000,
		.freq_high	= 1227999,
		.bandselect	= 0x01,
		.VCOdivider	= 2,
		.VCOnumber	= 1,
		.progdata	= (0 << 18) | (1 << 9) | 0x01,
	},
	{
		.freq_low	= 1228000,
		.freq_high	= 1349999,
		.bandselect	= 0x02,
		.VCOdivider	= 2,
		.VCOnumber	= 2,
		.progdata	= (0 << 18) | (1 << 9) | 0x02,
	},
	{
		.freq_low	= 1350000,
		.freq_high	= 1481999,
		.bandselect	= 0x04,
		.VCOdivider	= 2,
		.VCOnumber	= 3,
		.progdata	= (0 << 18) | (1 << 9) | 0x04,
	},
	{
		.freq_low	= 1482000,
		.freq_high	= 1595999,
		.bandselect	= 0x08,
		.VCOdivider	= 2,
		.VCOnumber	= 4,
		.progdata	= (0 << 18) | (1 << 9) | 0x08,
	},
	{
		.freq_low	= 1596000,
		.freq_high	= 1717999,
		.bandselect	= 0x10,
		.VCOdivider	= 2,
		.VCOnumber	= 5,
		.progdata	= (0 << 18) | (1 << 9) | 0x10,
	},
	{
		.freq_low	= 1718000,
		.freq_high	= 1855999,
		.bandselect	= 0x20,
		.VCOdivider	= 2,
		.VCOnumber	= 6,
		.progdata	= (0 << 18) | (1 << 9) | 0x20,
	},
	{
		.freq_low	= 1856000,
		.freq_high	= 2035999,
		.bandselect	= 0x40,
		.VCOdivider	= 2,
		.VCOnumber	= 7,
		.progdata	= (0 << 18) | (1 << 9) | 0x40,
	},
	{
		.freq_low	= 2036000,
		.freq_high	= 2149999,
		.bandselect	= 0x80,
		.VCOdivider	= 2,
		.VCOnumber	= 8,
		.progdata	= (0 << 18) | (1 << 9) | 0x80,
	},
};

static struct {
	u8 reg;
	u8 data;
} cx24123_regdata[] =
{
	{0x00, 0x03}, /* Reset system */
	{0x00, 0x00}, /* Clear reset */
	{0x01, 0x3b}, /* Apply sensible defaults, from an i2c sniffer */
	{0x03, 0x07},
	{0x04, 0x10},
	{0x05, 0x04},
	{0x06, 0x31},
	{0x0d, 0x02},
	{0x0e, 0x03},
	{0x0f, 0xfe},
	{0x10, 0x01},
	{0x14, 0x01},
	{0x15, 0x98},
	{0x16, 0x00},
	{0x17, 0x01},
	{0x1b, 0x05},
	{0x1c, 0x80},
	{0x1d, 0x00},
	{0x1e, 0x00},
	{0x20, 0x41},
	{0x21, 0x15},
	{0x27, 0x14},
	{0x28, 0x46},
	{0x29, 0x00},
	{0x2a, 0xb0},
	{0x2b, 0x73},
	{0x2c, 0x00},
	{0x2d, 0x00},
	{0x2e, 0x00},
	{0x2f, 0x00},
	{0x30, 0x00},
	{0x31, 0x00},
	{0x32, 0x8c},
	{0x33, 0x00},
	{0x34, 0x00},
	{0x35, 0x03},
	{0x36, 0x02},
	{0x37, 0x3a},
	{0x3a, 0x00},	/* Enable AGC accumulator */
	{0x44, 0x00},
	{0x45, 0x00},
	{0x46, 0x05},
	{0x56, 0x41},
	{0x57, 0xff},
	{0x67, 0x83},
};

static int cx24123_writereg(struct cx24123_state* state, int reg, int data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	int err;

	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
		printk("%s: writereg error(err == %i, reg == 0x%02x,"
			 " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
		return -EREMOTEIO;
	}

	return 0;
}

static int cx24123_writelnbreg(struct cx24123_state* state, int reg, int data)
{
	u8 buf[] = { reg, data };
	/* fixme: put the intersil addr int the config */
	struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 2 };
	int err;

	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
		printk("%s: writelnbreg error (err == %i, reg == 0x%02x,"
			 " data == 0x%02x)\n", __FUNCTION__, err, reg, data);
		return -EREMOTEIO;
	}

	/* cache the write, no way to read back */
	state->lnbreg = data;

	return 0;
}

static int cx24123_readreg(struct cx24123_state* state, u8 reg)
{
	int ret;
	u8 b0[] = { reg };
	u8 b1[] = { 0 };
	struct i2c_msg msg[] = {
		{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
		{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 }
	};

	ret = i2c_transfer(state->i2c, msg, 2);

	if (ret != 2) {
		printk("%s: reg=0x%x (error=%d)\n", __FUNCTION__, reg, ret);
		return ret;
	}

	return b1[0];
}

static int cx24123_readlnbreg(struct cx24123_state* state, u8 reg)
{
	return state->lnbreg;
}

static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion)
{
	switch (inversion) {
	case INVERSION_OFF:
		cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) & 0x7f);
		cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
		break;
	case INVERSION_ON:
		cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) | 0x80);
		cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
		break;
	case INVERSION_AUTO:
		cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) & 0x7f);
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_inversion_t *inversion)
{
	u8 val;

	val = cx24123_readreg(state, 0x1b) >> 7;

	if (val == 0)
		*inversion = INVERSION_OFF;
	else
		*inversion = INVERSION_ON;

	return 0;
}

static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec)
{
	if ( (fec < FEC_NONE) || (fec > FEC_AUTO) )
		fec = FEC_AUTO;

	/* Hardware has 5/11 and 3/5 but are never unused */
	switch (fec) {
	case FEC_NONE:
		return cx24123_writereg(state, 0x0f, 0x01);
	case FEC_1_2:
		return cx24123_writereg(state, 0x0f, 0x02);
	case FEC_2_3:
		return cx24123_writereg(state, 0x0f, 0x04);
	case FEC_3_4:
		return cx24123_writereg(state, 0x0f, 0x08);
	case FEC_5_6:
		return cx24123_writereg(state, 0x0f, 0x20);
	case FEC_7_8:
		return cx24123_writereg(state, 0x0f, 0x80);
	case FEC_AUTO:
		return cx24123_writereg(state, 0x0f, 0xae);
	default:
		return -EOPNOTSUPP;
	}
}

static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec)
{
	int ret;
	u8 val;

	ret = cx24123_readreg (state, 0x1b);
	if (ret < 0)
		return ret;
	val = ret & 0x07;
	switch (val) {
	case 1:
		*fec = FEC_1_2;
		break;
	case 3:
		*fec = FEC_2_3;
		break;
	case 4:
		*fec = FEC_3_4;
		break;
	case 5:
		*fec = FEC_4_5;
		break;
	case 6:
		*fec = FEC_5_6;
		break;
	case 7:
		*fec = FEC_7_8;
		break;
	case 2:	/* *fec = FEC_3_5; break; */
	case 0:	/* *fec = FEC_5_11; break; */
		*fec = FEC_AUTO;
		break;
	default:
		*fec = FEC_NONE; // can't happen
	}

	return 0;
}

/* fixme: Symbol rates < 3MSps may not work because of precision loss */
static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate)
{
	u32 val;

	val = (srate / 1185) * 100;

	/* Compensate for scaling up, by removing 17 symbols per 1Msps */
	val = val - (17 * (srate / 1000000));

	cx24123_writereg(state, 0x08, (val >> 16) & 0xff );
	cx24123_writereg(state, 0x09, (val >>  8) & 0xff );
	cx24123_writereg(state, 0x0a, (val      ) & 0xff );

	return 0;
}

/*
 * Based on the required frequency and symbolrate, the tuner AGC has to be configured
 * and the correct band selected. Calculate those values
 */
static int cx24123_pll_calculate(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
{
	struct cx24123_state *state = fe->demodulator_priv;
	u32 ndiv = 0, adiv = 0, vco_div = 0;
	int i = 0;

	/* Defaults for low freq, low rate */
	state->VCAarg = cx24123_AGC_vals[0].VCAprogdata;
	state->VGAarg = cx24123_AGC_vals[0].VGAprogdata;
	state->bandselectarg = cx24123_bandselect_vals[0].progdata;
	vco_div = cx24123_bandselect_vals[0].VCOdivider;