📄 vm_pfm_buck_ccm.mdl
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BlockType Ground
}
Block {
BlockType SignalConversion
OverrideOpt off
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Logic
Operator "AND"
Inputs "2"
AllPortsSameDT on
OutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
SampleTime "-1"
}
Block {
BlockType Lookup
InputValues "[-4:5]"
OutputValues " rand(1,10)-0.5"
LookUpMeth "Interpolation-Extrapolation"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
LUTDesignTableMode "Redesign Table"
LUTDesignDataSource "Block Dialog"
LUTDesignFunctionName "sqrt(x)"
LUTDesignUseExistingBP on
LUTDesignRelError "0.01"
LUTDesignAbsError "1e-6"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType PMIOPort
}
Block {
BlockType RelationalOperator
Operator ">="
InputSameDT on
LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Saturate
UpperLimit "0.5"
LowerLimit "-0.5"
LinearizeAsGain on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType Selector
InputType "Vector"
IndexMode "One-based"
ElementSrc "Internal"
Elements "1"
RowSrc "Internal"
Rows "1"
ColumnSrc "Internal"
Columns "1"
InputPortWidth "-1"
IndexIsStartValue off
OutputPortSize "1"
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Terminator
}
Block {
BlockType TriggerPort
TriggerType "rising"
StatesWhenEnabling "inherit"
ShowOutputPort off
OutputDataType "auto"
SampleTimeType "triggered"
SampleTime "1"
ZeroCross on
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "vm_pfm_buck_ccm"
Location [117, 158, 1117, 710]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Clock"
Ports [0, 1]
Position [685, 381, 725, 409]
SourceBlock "simulink_extras/Flip Flops/Clock"
SourceType "Digital clock"
ShowPortLabels on
MaskParam1 "0.8333e-6"
}
Block {
BlockType Constant
Name "Constant"
Position [85, 455, 115, 485]
}
Block {
BlockType Constant
Name "Constant1"
Position [355, 425, 385, 455]
Orientation "left"
NamePlacement "alternate"
Value "1.2"
}
Block {
BlockType Constant
Name "Constant2"
Position [70, 190, 100, 220]
Value "2"
}
Block {
BlockType Constant
Name "Constant3"
Position [90, 405, 120, 435]
}
Block {
BlockType Constant
Name "Constant4"
Position [85, 500, 115, 530]
}
Block {
BlockType Reference
Name "Current Measurement"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [470, 88, 495, 112]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "D Flip-Flop"
Ports [3, 2]
Position [280, 222, 325, 298]
SourceBlock "simulink_extras/Flip Flops/D Flip-Flop"
SourceType "DFlipFlop"
ShowPortLabels on
}
Block {
BlockType Reference
Name "DC Voltage Source"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [35, 145, 55, 180]
Orientation "up"
SourceBlock "powerlib/Electrical\nSources/DC Voltage Source"
SourceType "DC Voltage Source"
ShowPortLabels on
Amplitude "5"
Measurements "None"
}
Block {
BlockType Reference
Name "Diode"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [415, 150, 455, 205]
Orientation "up"
SourceBlock "powerlib/Power\nElectronics/Diode"
SourceType "Diode"
ShowPortLabels on
Ron "1"
Lon "0"
Vf "0.25"
IC "0"
Rs "500"
Cs "250e-9"
Measurements off
}
Block {
BlockType Reference
Name "Ground"
Ports [0, 0, 0, 0, 0, 1]
Position [34, 340, 56, 365]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "Ground1"
Ports [0, 0, 0, 0, 0, 1]
Position [424, 235, 446, 260]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "Ground2"
Ports [0, 0, 0, 0, 0, 1]
Position [659, 265, 681, 290]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "Ground3"
Ports [0, 0, 0, 0, 0, 1]
Position [619, 340, 641, 365]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Ports [2, 1]
Position [230, 217, 260, 248]
AllPortsSameDT off
OutDataTypeMode "Boolean"
}
Block {
BlockType Reference
Name "Mosfet"
Ports [1, 1, 0, 0, 0, 1, 1]
Position [310, 70, 365, 110]
NamePlacement "alternate"
SourceBlock "powerlib/Power\nElectronics/Mosfet"
SourceType "Mosfet"
ShowPortLabels on
Ron "0.001"
Lon "1e-6"
Rd ".001"
Vfd "0"
IC "0"
Rs "1e5"
Cs "inf"
Measurements on
}
Block {
BlockType Reference
Name "Parallel RLC Branch"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [644, 110, 696, 165]
Orientation "down"
NamePlacement "alternate"
AttributesFormatString "\\n"
SourceBlock "powerlib/Elements/Parallel RLC Branch"
SourceType "Parallel RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
RConnTagsString "__new0"
BranchType "RC"
Resistance "3"
Inductance "[]"
SetiL0 off
InitialCurrent "0"
Capacitance "10e-6"
Setx0 on
InitialVoltage "0"
Measurements "None"
}
Block {
BlockType DiscretePulseGenerator
Name "Pulse\nGenerator"
Ports [0, 1]
Position [75, 323, 120, 357]
PulseType "Time based"
Amplitude "2"
Period "4.1667e-7"
PulseWidth "50"
PhaseDelay "1e-8"
}
Block {
BlockType Reference
Name "R1"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [616, 125, 644, 195]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
BranchType "R"
Resistance "5e4"
Inductance "[]"
SetiL0 off
InitialCurrent "0"
Capacitance "[]"
Setx0 off
InitialVoltage "0"
Measurements "None"
}
Block {
BlockType Reference
Name "R2"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [616, 235, 644, 305]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
BranchType "R"
Resistance "1e5"
Inductance "[]"
SetiL0 off
InitialCurrent "0"
Capacitance "[]"
Setx0 off
InitialVoltage "0"
Measurements "None"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator"
Position [260, 462, 290, 493]
Orientation "left"
NamePlacement "alternate"
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator1"
Position [150, 197, 180, 228]
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator2"
Position [150, 332, 180, 363]
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator3"
Position [140, 462, 170, 493]
Operator "=="
InputSameDT off
LogicOutDataTypeMode "Boolean"
}
Block {
BlockType Reference
Name "Repeating\nSequence1"
Ports [0, 1]
Position [75, 245, 105, 275]
SourceBlock "simulink/Sources/Repeating\nSequence"
SourceType "Repeating table"
ShowPortLabels on
rep_seq_t "[0 0.8333e-6]"
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