ncr710init2.n

vxworks源码源码解读是学习vxworks的最佳途径

; ncr710init2.n Script code for ncr710Lib2 Driver 
;
; Copyright 1989-1999 Wind River Systems, Inc.
;
;/*
;Modification history
;--------------------
;04h,03dec98,ihw    Modified to support concatenated IDENTIFY/normal message
;                   out during activation of a new thread.  See ncr710Lib.c.
;		    (SPR 24089)
;04g,07nov95,jds    fix for phase mismatch during ncr710InitStart when 
;		    nextPhase is called without enabling mismatchATNIntrEnable,
;		    causing a scsi system hang during a normal phase mismatch.
;04f,28apr95,jds    worked with Ian in highlighting selection problem with 
;		    wd33c93. Integrated into WRS tree; backwarcd compatability
;04e,16mar95,ihw    fixed problems highlighted by selection by WD 33C93
;                   improved message-out handling (minor bugs fixed)
;04d,03jun94,ihw    corrected problem with NCR_COMPILE macro
;04c,27may94,ihw    documented prior to release
;04b,02may94,ihw    modifications to work with new SCSI architecture
;    	    	    supports tagged commands
;04a,18feb94,ihw    Major modifications to work with enhanced SCSI library
;                   and to be compatible with standard NCR development tools.
;03f,20jul92,eve    Added documentation. 
;03e,20jul92,eve    Rename end label to endTransact.
;03d,03jul92,eve    Include NCR_COMPILER_BUG in the file.
;03c,04mar92,eve    Start disconnect implementation.
;03b,16jan92,eve    Add ackMsg1 ,ackAtnMsg and endAbort, remove 
;		    script test proc.
;03a,30oct91,eve    Remove int capability in end label,the scsi 
;		    status is process by the ncr710Lib driver.
;02a,26oct91,eve    Add enable disable timout between selection
;		    step.
;01a,23oct91,eve    Created and add comments
;
;INTERNAL
;Note: This documentation is not exactly accurate. Will need fixing.
;
;NCR710 FEATURE USED
;This chip has code which performs some action on the scsi bus.
;The description level of the code is close to an assembly language and 
;dedicated for scsi bus operations. 
;The opcode is a pair of 32bit word that allow some basic operations in the 
;code (jump, tests values) and on the scsi (select ,assert line):
;
;block move instruction.
;  move from <offset> when PHASE_NAME
;  ........
;I/O instructions 
;  set target 
;  wait DISCONNECT
;  wait RESELECT
;  select from <offset>,@jump
;  .........  
;read/write register instructions
;  move REG_NAME to SBFR
;  .........  
; 
;transfert control instructions
;  jump <Label> 
;  int <value> when PHASE_NAME
;  ........... 
;  move memory instruction
;  never use.  
; 
;The previous example does not included all of the instruction set, 
;see the NCR data reference manual.
;Another key point is the capability of the script to perform some 
;limited indirect addressing to get information from the cpu memory.
;This is used to get Target ID to select it, to get data, message pointer
;and count during transfer phase.  This avoids having to patch the script
;at the run time to specify count, data pointer and target ID.
;
;Script can tranfer directly, with its DMA core, a data block from/to the 
;scsi bus from/to cpu memory.
;The instruction involved is :
;        move from <offset> when PHASE_NAME
; 
;In this case the offset is hard coded in the ncr710Script.h and indexed the
;right field in the NCR_CTL structure (see ncr710Script.h). 
; 
;The field looks like :
;    aligned 32 bit @->00xxxxxx  24bit count
;                    ->ZZZZZZZZ  32bit address pointer.
; 
;The offset is added to the content of the DNAD register, loaded at 
;the run time with the base address of the structure.
; 
;In the same way the select instruction uses a field like:
;        select from <offset> ,<Alternate jump @>
;
; where offset + DNAD points to a field like:
;aligned 32 bit@->0000|0000|xxxx xxxx|xPPP  |SSSS|0000|0000
;                           Target ID|Period|Offset
;
;The Period and offset are used when a target supports the synchronous 
;transfert.
;
;INTERRUPT SOURCE
;The chip has three main kind of interrupt, scsi, dma interrupt and 
;script  interrupt.  The scsi interrupts are maskable individually with 
;the sien register.
;.CS
;SIEN
;  7    M/A Mismatch interrupt(initiator)/ ATN assert (Target)
;       Used in the driver to detect a phase change during data/msg
;       transfert.The ncr is never used in target mode.
;  6    FCMP function complete Not used (masked).
;  5    STO scsi Bus Time out
;       Used to get timeout on select.(**)
;  4    SEL selected or reselected Not used in the driver.(masked).
;  3    SGE scsi Gross error. Used in the driver.
;  2    UDC unexpected disconnect.
;       Used to detect unexpected target disconnection or an expected 
;       disconnect if the target received a "device reset message".
;  1    RST scsi reset received (not used).(masked)(***)
;  0    PAR parity error not used.(masked)(***)
;
;(**)    The script disable the timeout capability by setting the bit 7 
;        in CTEST7 register.  Because the ncr will generate also a timeout
;        interrupt  if no activity occur on the scsi bus after 250ms,
;        and not only during a scsi select.
;
;(***)  This case should be processed, but not included in the driver today.
;.CE
;
;The Dma interrupts are maskable with the DIEN register:
;.CS
;DIEN
;  7   Reserved
;  6   Reserved
;  5   BF bus fault.Memory acces error.
;  4   Aborted ,means that the abort bit have been set in ISTAT reg
;      This case never happen (Abort bit not used).
;  3   SSI single step interrupt.Not used in the operational mode.
;      This bit is used in single step debug mode in the driver,
;      allowing to execute script step by step..
;  2   SIR script interrupt,used to detect a script intruction
;      <int ...>.
;  1   WTD Watchdog interrupt.This case never happens because
;      The watchdog timeout value is set to 0 in DWT register.
;  0   IID illegal instruction detected.  Recieved in two
;      cases :1-Bad opcode, 2-count set to 0 in the <move> opcode.
;.CE
;
;The other register involved  in  the  interrupt  process  is ISTAT.
;This register is the ONLY READABLE/WRITABLE  register during a script 
;execution.
;.CS
; ISTAT
; 7   ABRT Abort current instruction.Not used
; 6   RST  software reset used to set the chip to a known state.
; 5   SIGP signal process bit.This bit is used in the ncr driver to support
;     the connect disconnect to get an interrupt to start a new scsi 
;     command.(SEE CONNECT/DISCONNECT ...).
; 4   Reserved.
; 3   Connected ,not used.
; 2   Reserved.
; 1   SIP scsi interrupt pending.Used at interrupt
;     level to detect and clear SIEN interrupt.
; 0   DIP dma interrupt pending.Used at interrupt
;     level to detect and clear DIEN interrupt.
;.CE
;The interrupt are cleared by reading the register source, and by 
;checking  the DIP and SIP bit in ISTAT.  Because the chip has a stack 
;interrupt ,the DIEN and SIEN registers are read until the ISTAT bits 
;are cleared to be sure there is no interrupt pending.
;
;The last interrupt source is the script <INT> opcode. 
;This instruction is  used to interrupt the cpu if the scsi 
;transaction involves a cpu process.
;.CS
;    int <int value> [<condition><value>] (pg 6-10 of the programmers guide).
;.CE
;The <int value> is used in the driver code to detect the scsi condition  
;and takes a decision for the next step of the transaction.  
;This value is loaded from the opcode and read by the  CPU in the 
;DSPS register.
;
;CONNECT/DISCONNECT AND NEW COMMAND START
;
;When connect/disconnect is enabled, the target could reconnect at any time.
;This is notified to the target by an identify message send by the initiator
;after a successful selection of the target.
;The  disconnect is always sent to an initiator by a DISCONNECT message.
;The reconnect could occur at any arbitration phase.  
;To be able to detect it at any time the chip has to wait for a reconnect 
;on the scsi ,which is done with the <wait reconnect> script opcode:
;  wait RECONNECT,<Alternate @>
;  <next opcode>
;.CS
;  If a reconnect occurs, then the <next opcode>
;  is executed.If the SIGP bit is set the script
;  jump to <Alternate @>
;.CE
;
;But a reconnect could also occurs during a  <select>  opcode for  another  
;device (it looses the arbitration).  The <wait RECONNECT> instruction is 
;the idle script entry point.  They are two way to abort this instruction:
;
;  1-The Sigp bit is set
;  2-A reconnect,or a select occur ,in this case
;    select means that the initiator is selected as
;    a target on the scsi bus
;
;The sigp bit is used to detect and start a new command at interrupt level. 
;It is set at task level each time that a new command has to be run.
;
;
;.CS
;SCRIPT START FLOW CHART
;The reselected path is driven by a physical scsi reconnect/select.
;
;IDLE ENTRY POINT
;<waitSelect>
;Wait for a reselect ,Alternate @-------->
;and test sigp ?                         | SIGP set or Select to start
;  |                                     |
;  |<-reselect                           /
;  |                       No    <checkNewCmd>
;  |                     /-------Check if we are connected ?
;<reselected>            |       clear SIGP
;save Targ/init ID       |       Wait for reselect,<@select as a target>
;from LCRC register      |       Jump to <reselected>    |
;Get identify            |                               |
;Msg in.                 <startNewCmd>                   |
;int Cpu <reselected>    test and clear SIGP     int Cpu <SELECT AS A TARGET>
;                        1) SIGP set
;                        int Cpu <NEW COMMAND>
;                        2) SIGP clear
;                        int Cpu <BAD NEW COMD>
;.CE
;a) RESELECT
;At interrupt level, the target ID from the saved LCRC register (LCRC contain
;the data bus value that is <the target ID> | <initiator ID>) and the LUN 
;extracted from the identify message sent by the target are used to index 
;an array that keep track of each PHYS_DEV nexus (Max = 64) in the  SIOP  
;structure (driver structure).
;
;b) NEW COMMAND
;A global variable <pNcrCtlCmd> in the SIOP structure  allows the script to be 
;start at a selected entry point with the script address included in this 
;current nexus pointer in pNcrCtlCmd.
;
;c)SELECT AS A TARGET
;Some support for target mode is required if the NCR710 is to be used in a
;multi-initiator system which probes the SCSI bus (e.g. "scsiAutoConfig()"
;in VxWorks).  This script simply reads 6 command bytes then disconnects,
;which should cause the initiator to abort the command.
;
;d)BAD NEW CMD
;It's a bogus start command restart script at the IDLE Point.
;
;SCRIPT REMARKS
;This script performs a scsi transaction.  This script is a part of 
;the usual scsi phase routine.  This code is only compatible with the 
;ncr710 because it uses an indirect addressing mode to avoid relocation 
;at run time.
;All of the external values will be relative to the DSA register.
;DSA register has to be loaded whith the address of the nexus host memory
;structure (see ncr710Script.h).
;SCRATCH0 is used to hold phase requested to be able to process a phase 
;mismatch during any data or message phase.  Usually that occur before a 
;legal disconnect from the target (save pointer and disconnect message).
;SCRATCH1 and SCRATCH2 are used to hold state variables for processing
;messages in and out.
;SRATCH3 register is used to save the LCRC register. LCRC is stamped with
;the initiator ID and target ID when a reconnect (initiator is selected
;by a target) occurs.
;*/

#define  NCR_COMPILE
#define INCLUDE_SCSI2
#include "drv/scsi/ncr710Script.h"

;/*****************************************************************************
;*
;* ncr710Wait - wait for re-selection by target, selection by initiator, or
;*              new command from host
;*/

PROC ncr710Wait:

call	REL(timeoutDisable)

call	REL(mismatchATNIntrDisable)

wait	reselect REL(checkNewCmd)

;
; Have been re-selected by a SCSI target
;
reselected:

clear	target					; required in case SIGP set

move	lcrc to sfbr				; save target ID for ISR
move	sfbr to TARGET_BUS_ID

;
; Check and receive IDENTIFY message in (error if none or incorrect message)
;
int	NCR710_NO_IDENTIFY, when not MSG_IN	; check correct phase

move	from OFFSET_IDENT_IN, when MSG_IN	; read message

int	NCR710_NO_IDENTIFY if not 0x80 and mask 0x7f	; check for IDENTIFY

move	FLAGS_IDENTIFY to HOST_FLAGS
int	NCR710_RESELECTED			; all seems OK so far


;
; Have been selected as a target by another SCSI device.
;
selected:

set	target					; required in case SIGP set

move	lcrc to sfbr				; save initiator ID for ISR
move	sfbr to TARGET_BUS_ID

;
; Wait for SEL to be de-asserted (see NCR Device Errata Listing 135, item 2)
;
selAsserted:

move	sbcl & SBCL_SEL to sfbr			; get state of SCSI SEL line
jump	REL(selAsserted) if not 0		; loop while SEL is asserted

;
; Test whether ATN is asserted during selection
;
move	sbcl & SBCL_ATN to sfbr			; get state of SCSI ATN line
jump	REL(atnAsserted) if not 0

;
; Selection without ATN, and hence without an identification message
;
move	0 to HOST_FLAGS
int	NCR710_SELECTED

;
; Selection with ATN - read IDENTIFY message in
;
atnAsserted:

move	from OFFSET_IDENT_IN, with MSG_OUT	; read [sic] IDENTIFY message

move	FLAGS_IDENTIFY to HOST_FLAGS
int	NCR710_SELECTED

;
; May have a new host command to handle - check the SIGP bit
;
checkNewCmd:

move	scntl1 & SCNTL1_CONNECTED to sfbr	; connected on SCSI bus ?

jump	REL(ackCmd) if 0			; no: must be host command

; Connected - must have been selected or re-selected

move	ctest2 & CTEST2_SIGNAL to sfbr		; clear SIGP bit

wait	reselect REL(selected)			; if target -> selected

jump	REL(reselected)				; else      -> reselected

;
; Should have a new host command to handle
;
ackCmd:

move	ctest2 & CTEST2_SIGNAL to sfbr		; test and clear SIGP bit