mmualib.s

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/* mmuALib.s - mmu library for i86 */

/* Copyright 1984-1993 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01b,02nov94,hdn  added a support for PCD and PWT bit for 486 and Pentium
01a,26jul93,hdn  written.
*/

/*

*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "asm.h"
#include "regs.h"


	/* exports */

	.globl	_mmuEnable
	.globl	_mmuOn
	.globl	_mmuOff
	.globl	_mmuPdbrSet
	.globl	_mmuPdbrGet
	.globl	_mmuTLBFlush

	/* imports */

	.globl	_mmuEnabled
	.globl	_sysProcessor

	.text
	.align 4

 
/******************************************************************************
*
* mmuEnable - turn mmu on or off
*
* RETURNS: OK

* STATUS mmuEnable 
*    (
*    BOOL enable		/@ TRUE to enable, FALSE to disable MMU @/
*    )

*/

_mmuEnable:
	cli
	movl	4(%esp),%edx
        movl    %cr0,%eax
        movl    %edx,_mmuEnabled
	cmpl	$0,%edx
	je	mmuDisable
	orl     $0x80010000,%eax	/* set PG and WP */
	jmp     mmuEnable0

mmuDisable:
	andl    $0x7ffeffff,%eax	/* clear PG and WP */

mmuEnable0:
	movl    %eax,%cr0
	jmp     mmuEnable1		/* flush prefetch queue */
mmuEnable1:
	movl	$0,%eax
	sti
	ret

/******************************************************************************
*
* mmuOn - turn MMU on 
*
* This routine assumes that interrupts are locked out.  It is called internally
* to enable the mmu after it has been disabled for a short period of time
* to access internal data structs.
*
* NOMANUAL

* void mmuOn (void)

*/

	.align 4
_mmuOn:
        movl    %cr0,%eax
	orl     $0x80010000,%eax	/* set PG and WP */
	movl    %eax,%cr0
	jmp     mmuOn0			/* flush prefetch queue */
mmuOn0:
	ret

/******************************************************************************
*
* mmuOff - turn MMU off 
*
* This routine assumes that interrupts are locked out.  It is called internally
* to disable the mmu for a short period of time
* to access internal data structs.
*
* NOMANUAL

* void mmuOff (void)

*/

	.align 4
_mmuOff:
	movl    %cr0,%eax
	andl    $0x7ffeffff,%eax	/* clear PG and WP */
	movl    %eax,%cr0
	jmp     mmuOff0			/* flush prefetch queue */
mmuOff0:
	ret

/*******************************************************************************
*
* mmuPdbrSet - Set Page Directory Base Register
*
* This routine Set Page Directory Base Register.
*
* NOMANUAL

* void mmuPdbrSet 
*	(
*	MMU_TRANS_TBL *transTbl;
*	)
 
*/

	.align 4
_mmuPdbrSet:
	cli
	movl	4(%esp),%eax
	movl	(%eax),%eax
	andl	$0xfffff000,%eax
	movl	%cr3,%edx
	andl	$0x00000fff,%edx
	cmpl	$ X86CPU_386,_sysProcessor
	je	mmuPdbrSet1
	andl	$0x00000fe7,%edx
mmuPdbrSet1:
	orl	%edx,%eax
	movl	%eax,%cr3
	jmp	mmuPdbrSet0		/* flush prefetch queue */
mmuPdbrSet0:
	sti
	ret

/*******************************************************************************
*
* mmuPdbrGet - Get Page Directory Base Register
*
* This routine Get Page Directory Base Register.
*
* NOMANUAL

* MMU_TRANS_TBL *mmuPdbrGet (void)
 
*/

	.align 4
_mmuPdbrGet:
	cli
	movl	%cr3,%eax
	andl	$0xfffff000,%eax
	jmp	mmuPdbrGet0		/* flush prefetch queue */
mmuPdbrGet0:
	sti
	ret

/******************************************************************************
*
* mmuTLBFlush - flush the Translation Lookaside Buffer.
*
* NOMANUAL

* void mmuTLBFlush (void)

*/

	.align 4
_mmuTLBFlush:
	cli
	movl	%cr3,%eax
	movl	%eax,%cr3
	jmp	mmuTLBFlush0		/* flush prefetch queue */
mmuTLBFlush0:
	sti
	ret