mmupro36alib.s

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/* mmuPro36ALib.s - mmu library for i86 */

/* Copyright 1984-1998 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01d,17sep98,hdn  renamed mmuEnabled to mmuPro36Enabled.
01c,13apr98,hdn  added support for PentiumPro's 36bit MMU.
01b,02nov94,hdn  added a support for PCD and PWT bit for 486 and Pentium
01a,26jul93,hdn  written.
*/

/*

*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "asm.h"
#include "regs.h"


	/* exports */

	.globl	_mmuPro36Enable
	.globl	_mmuPro36On
	.globl	_mmuPro36Off
	.globl	_mmuPro36PdbrSet
	.globl	_mmuPro36PdbrGet
	.globl	_mmuPro36TLBFlush

	/* imports */

	.globl	_mmuPro36Enabled
	.globl	_sysProcessor

	.text
	.align 4

 
/******************************************************************************
*
* mmuEnable - turn mmu on or off
*
* RETURNS: OK

* STATUS mmuEnable 
*    (
*    BOOL enable		/@ TRUE to enable, FALSE to disable MMU @/
*    )

*/

_mmuPro36Enable:
	cli				/* LOCK INTERRUPT */
	movl	4(%esp),%edx
        movl    %cr0,%eax
        movl    %edx,_mmuPro36Enabled
	cmpl	$0,%edx
	je	mmuPro36Disable
	orl     $0x80010000,%eax	/* set PG, WP in CR0 */
	movl    %eax,%edx
        movl    %cr4,%eax
	orl	$0x000000a0,%eax	/* set PAE, PGE in CR4 */
	movl    %eax,%cr4
	movl    %edx,%eax
	movl    %eax,%cr0
	jmp     mmuPro36Enable1		/* flush prefetch queue */

mmuPro36Disable:
	andl    $0x7ffeffff,%eax	/* clear PG, WP in CR0 */
	movl    %eax,%edx
        movl    %cr4,%eax
	andl	$0xffffff5f,%eax	/* clear PAE, PGE in CR4 */
	movl    %eax,%cr4
	movl    %edx,%eax
	movl    %eax,%cr0
	jmp     mmuPro36Enable1		/* flush prefetch queue */

mmuPro36Enable1:
	movl	$0,%eax
	sti				/* UNLOCK INTERRUPT */
	ret

/******************************************************************************
*
* mmuOn - turn MMU on 
*
* This routine assumes that interrupts are locked out.  It is called internally
* to enable the mmu after it has been disabled for a short period of time
* to access internal data structs.
*
* NOMANUAL

* void mmuOn (void)

*/

	.align 4
_mmuPro36On:
        movl    %cr0,%eax
	orl     $0x80010000,%eax	/* set PG and WP */
	movl    %eax,%edx
        movl    %cr4,%eax
	orl	$0x000000a0,%eax	/* set PAE, PGE in CR4 */
	movl    %eax,%cr4
	movl    %edx,%eax
	movl    %eax,%cr0
	jmp     mmuPro36On0		/* flush prefetch queue */
mmuPro36On0:
	ret

/******************************************************************************
*
* mmuOff - turn MMU off 
*
* This routine assumes that interrupts are locked out.  It is called internally
* to disable the mmu for a short period of time
* to access internal data structs.
*
* NOMANUAL

* void mmuOff (void)

*/

	.align 4
_mmuPro36Off:
	movl    %cr0,%eax
	andl    $0x7ffeffff,%eax	/* clear PG and WP */
	movl    %eax,%edx
        movl    %cr4,%eax
	andl	$0xffffff5f,%eax	/* clear PAE, PGE in CR4 */
	movl    %eax,%cr4
	movl    %edx,%eax
	movl    %eax,%cr0
	jmp     mmuPro36Off0		/* flush prefetch queue */
mmuPro36Off0:
	ret

/*******************************************************************************
*
* mmuPdbrSet - Set Page Directory Base Register
*
* This routine Set Page Directory Base Register.
*
* NOMANUAL

* void mmuPdbrSet 
*	(
*	void *transTbl;
*	)
 
*/

	.align 4
_mmuPro36PdbrSet:
	cli				/* LOCK INTERRUPT */
	movl	4(%esp),%eax
	movl	(%eax),%eax
	movl	%cr3,%edx
	movl	$0xfffff000,%ecx	/* upper 20 bits */
	andl	$0x00000fff,%edx
	cmpl	$ X86CPU_386,_sysProcessor
	je	mmuPro36PdbrSet1
	movl	$0xffffffe0,%ecx	/* upper 27 bits */
	andl	$0x00000007,%edx	/* PCD=0 PWT=0 */
mmuPro36PdbrSet1:
	andl	%ecx,%eax
	orl	%edx,%eax
	movl	%eax,%cr3
	jmp	mmuPro36PdbrSet0	/* flush prefetch queue */
mmuPro36PdbrSet0:
	sti				/* UNLOCK INTERRUPT */
	ret

/*******************************************************************************
*
* mmuPdbrGet - Get Page Directory Base Register
*
* This routine Get Page Directory Base Register.
*
* NOMANUAL

* MMU_TRANS_TBL *mmuPdbrGet (void)
 
*/

	.align 4
_mmuPro36PdbrGet:
	cli				/* LOCK INTERRUPT */
	movl	%cr3,%eax
	movl	$0xfffff000,%edx	/* upper 20 bits */
	cmpl	$ X86CPU_386,_sysProcessor
	je	mmuPro36PdbrGet1
	movl	$0xffffffe0,%edx	/* upper 27 bits */
mmuPro36PdbrGet1:
	andl	%edx,%eax
	jmp	mmuPro36PdbrGet0		/* flush prefetch queue */
mmuPro36PdbrGet0:
	sti				/* UNLOCK INTERRUPT */
	ret

/******************************************************************************
*
* mmuTLBFlush - flush the Translation Lookaside Buffer.
*
* NOMANUAL

* void mmuTLBFlush (void)

*/

	.align 4
_mmuPro36TLBFlush:
	cli				/* LOCK INTERRUPT */
	movl	%cr3,%eax
	movl	%eax,%cr3
	jmp	mmuPro36TLBFlush0		/* flush prefetch queue */

mmuPro36TLBFlush0:
	sti				/* UNLOCK INTERRUPT */
	ret