cachealib.s

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/* cacheALib.s - i80x86 cache management assembly routines */

/* Copyright 1984-1993 Wind River Systems, Inc. */
	.data
	.globl  _copyright_wind_river
	.long   _copyright_wind_river

/*
modification history
--------------------
01g,27oct94,hdn  changed NW bit not to set.
01f,27sep94,hdn  changed cacheClear to use wbinvd.
01e,29may94,hdn  changed a macro I80486 to sysProcessor.
01d,05nov93,hdn  added cacheFlush.
01c,27jul93,hdn  changed cacheClear that uses wbinvd now.
01b,08jun93,hdn  updated to 5.1.
01a,16mar93,hdn  written based on TRON version.
*/

/*
DESCRIPTION
This module contains routines to modify the i80x86 cache control registers.

SEE ALSO: "i80x86 Microprocessor User's Manual"
*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "asm.h"
#include "regs.h"


	/* internals */

	.globl	_cache486Reset
	.globl	_cache486Enable
	.globl	_cache486Disable
	.globl	_cache486Lock
	.globl	_cache486Unlock
	.globl	_cache486Clear
	.globl	_cache486Flush

	.text
	.align 4


/*******************************************************************************
*
* cache486Reset - reset a cache by clearing it and disabling
*
* This routine resets the all caches.
*
* RETURNS: OK

* STATUS cache486Reset ()

*/


	.align 4,0x90
_cache486Reset:
	
	movl	%cr0,%eax
	orl	$ CR0_CD,%eax
	andl	$ CR0_NW_NOT,%eax
	movl	%eax,%cr0
	/* wbinvd */
	.byte	0x0f,0x09
	ret


/*******************************************************************************
*
* cache486Enable - enable a cache
*
* This routine enables the specified cache.
*
* RETURNS: OK, or ERROR if cache, or control not supported.

* STATUS cache486Enable (cache)
*     int cache;		/* cache to enable *

*/


	.align 4,0x90
_cache486Enable:
_cache486Unlock:

	movl	%cr0,%eax
	andl	$ CR0_CD_NOT,%eax
	andl	$ CR0_NW_NOT,%eax
	movl	%eax,%cr0
	ret


/*******************************************************************************
*
* cache486Disable - disable a cache
*
* This routine disables the specified cache.
*
* RETURNS: OK, or ERROR if cache, or control not supported.

* STATUS cache486Disable (cache)
*     int cache;		/* cache to disable *

*/


	.align 4,0x90
_cache486Disable:

	movl	%cr0,%eax
	orl	$ CR0_CD,%eax
	andl	$ CR0_NW_NOT,%eax
	movl	%eax,%cr0
	/* wbinvd */
	.byte	0x0f,0x09
	ret


/*******************************************************************************
*
* cache486Lock - lock all entries in a cache
*
* This routine locks all entries in the specified cache.
*
* RETURNS: OK

* STATUS cache486Lock ()

*/


	.align 4,0x90
_cache486Lock:
	
	movl	%cr0,%eax
	andl	$ CR0_NW_NOT,%eax
	orl	$ CR0_CD,%eax
	movl	%eax,%cr0
	ret

/*******************************************************************************
*
* cache486Clear - clear all entries in a cache
*
* This routine clear all entries in the specified cache.
*
* RETURNS: OK, or ERROR if cache, or control not supported.

* STATUS cache486Clear (cache)
*     int cache;		/* cache to clear *

*/

	.align 4,0x90
_cache486Clear:
	
	/* wbinvd */
	.byte	0x0f,0x09
	ret

/*******************************************************************************
*
* cache486Flush - flush all entries in a cache
*
* This routine flush all entries in the specified cache.
*
* RETURNS: OK, or ERROR if cache, or control not supported.

* STATUS cache486Flush (cache)
*     int cache;		/* cache to clear *

*/

	.align 4,0x90
_cache486Flush:
	
	/* wbinvd */
	.byte	0x0f,0x09
	ret