control1.rpt
来自「ProtelDXp 实现计算器功能」· RPT 代码 · 共 732 行 · 第 1/3 页
RPT
732 行
192 - - - 37 INPUT ^ 0 0 0 1 opb11
205 - - - 50 INPUT ^ 0 0 0 1 opb12
9 - - A -- INPUT ^ 0 0 0 1 opb13
196 - - - 41 INPUT ^ 0 0 0 1 opb20
64 - - - 35 INPUT ^ 0 0 0 1 opb21
189 - - - 30 INPUT ^ 0 0 0 1 opb22
67 - - - 33 INPUT ^ 0 0 0 1 opb23
26 - - F -- INPUT ^ 0 0 0 1 opc10
100 - - - 05 INPUT ^ 0 0 0 1 opc11
87 - - - 21 INPUT ^ 0 0 0 1 opc12
96 - - - 08 INPUT ^ 0 0 0 1 opc13
176 - - - 23 INPUT ^ 0 0 0 1 opc20
86 - - - 23 INPUT ^ 0 0 0 1 opc21
99 - - - 06 INPUT ^ 0 0 0 1 opc22
126 - - F -- INPUT ^ 0 0 0 1 opc23
80 - - - -- INPUT ^ 0 0 0 1 opd10
184 - - - -- INPUT ^ 0 0 0 1 opd11
183 - - - -- INPUT ^ 0 0 0 1 opd12
27 - - F -- INPUT ^ 0 0 0 1 opd13
182 - - - -- INPUT ^ 0 0 0 1 opd20
79 - - - -- INPUT ^ 0 0 0 1 opd21
83 - - - 25 INPUT ^ 0 0 0 1 opd22
180 - - - 26 INPUT ^ 0 0 0 1 opd23
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: e:\cal\control1.rpt
control1
** OUTPUTS **
Fed By Fed By Fan-In Fan-Out
Pin LC EC Row Col Primitive Code INP FBK OUT FBK Name
56 - - - 45 OUTPUT 0 1 0 0 outa0
148 - - A -- OUTPUT 0 1 0 0 outa1
40 - - J -- OUTPUT 0 1 0 0 outa2
44 - - K -- OUTPUT 0 1 0 0 outa3
200 - - - 46 OUTPUT 0 1 0 0 outb0
8 - - A -- OUTPUT 0 1 0 0 outb1
199 - - - 45 OUTPUT 0 1 0 0 outb2
149 - - A -- OUTPUT 0 1 0 0 outb3
127 - - F -- OUTPUT 0 1 0 0 outc0
158 - - - 10 OUTPUT 0 1 0 0 outc1
29 - - G -- OUTPUT 0 1 0 0 outc2
47 - - L -- OUTPUT 0 1 0 0 outc3
113 - - K -- OUTPUT 0 1 0 0 outd0
95 - - - 09 OUTPUT 0 1 0 0 outd1
157 - - - 09 OUTPUT 0 1 0 0 outd2
125 - - F -- OUTPUT 0 1 0 0 outd3
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: e:\cal\control1.rpt
control1
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 2 - A 46 OR2 3 0 1 0 :94
- 6 - A 46 OR2 3 0 1 0 :97
- 7 - A 46 OR2 3 0 1 0 :100
- 8 - A 46 OR2 3 0 1 0 :103
- 5 - A 46 OR2 3 0 1 0 :106
- 1 - A 46 OR2 3 0 1 0 :109
- 4 - A 46 OR2 3 0 1 0 :112
- 3 - A 46 OR2 3 0 1 0 :115
- 3 - F 10 OR2 3 0 1 0 :118
- 1 - F 10 OR2 3 0 1 0 :121
- 5 - F 10 OR2 3 0 1 0 :124
- 7 - F 10 OR2 3 0 1 0 :127
- 8 - F 10 OR2 3 0 1 0 :130
- 4 - F 10 OR2 3 0 1 0 :133
- 2 - F 10 OR2 3 0 1 0 :136
- 6 - F 10 OR2 3 0 1 0 :139
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: e:\cal\control1.rpt
control1
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 9/208( 4%) 0/104( 0%) 10/104( 9%) 4/16( 25%) 3/16( 18%) 0/16( 0%)
B: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
C: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
D: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
E: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
F: 4/208( 1%) 9/104( 8%) 0/104( 0%) 3/16( 18%) 2/16( 12%) 0/16( 0%)
G: 1/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
H: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
I: 0/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
J: 0/208( 0%) 0/104( 0%) 1/104( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
K: 0/208( 0%) 1/104( 0%) 1/104( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
L: 1/208( 0%) 0/104( 0%) 0/104( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
09: 5/24( 20%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
10: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
25: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
26: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
27: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
28: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
29: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
30: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
31: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
32: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
33: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
34: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
35: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
36: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
37: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
38: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
39: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
40: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
41: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
42: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
43: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
44: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
45: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
46: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
47: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
48: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
49: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
50: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
51: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
52: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: e:\cal\control1.rpt
control1
** EQUATIONS **
con : INPUT;
opa10 : INPUT;
opa11 : INPUT;
opa12 : INPUT;
opa13 : INPUT;
opa20 : INPUT;
opa21 : INPUT;
opa22 : INPUT;
opa23 : INPUT;
opb10 : INPUT;
opb11 : INPUT;
opb12 : INPUT;
opb13 : INPUT;
opb20 : INPUT;
opb21 : INPUT;
opb22 : INPUT;
opb23 : INPUT;
opc10 : INPUT;
opc11 : INPUT;
opc12 : INPUT;
opc13 : INPUT;
opc20 : INPUT;
opc21 : INPUT;
opc22 : INPUT;
opc23 : INPUT;
opd10 : INPUT;
opd11 : INPUT;
opd12 : INPUT;
opd13 : INPUT;
opd20 : INPUT;
opd21 : INPUT;
opd22 : INPUT;
opd23 : INPUT;
-- Node name is 'outa0' from file "control1.tdf" line 15, column 5
-- Equation name is 'outa0', type is output
outa0 = _LC2_A46;
-- Node name is 'outa1' from file "control1.tdf" line 15, column 5
-- Equation name is 'outa1', type is output
outa1 = _LC6_A46;
-- Node name is 'outa2' from file "control1.tdf" line 15, column 5
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