reg1.fit

ProtelDXp 实现计算器功能

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 06/27/2007 11:47:41      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "reg1"
BEGIN

    DEVICE = "EP1K100QC208-3";

    "CLK"                          : INPUT_PIN  = 79     ;
    "CLRN"                         : INPUT_PIN  = 78     ;
    "D0"                           : INPUT_PIN  = 183    ;
    "D1"                           : INPUT_PIN  = 80     ;
    "D2"                           : INPUT_PIN  = 182    ;
    "D3"                           : INPUT_PIN  = 184    ;
    "Q0"                           : OUTPUT_PIN = 135    ;
    "Q1"                           : OUTPUT_PIN = 141    ;
    "Q2"                           : OUTPUT_PIN = 46     ;
    "Q3"                           : OUTPUT_PIN = 26     ;
    ":1"                           : LOCATION   = LC1_D15;
    ":3"                           : LOCATION   = LC1_C20;
    ":4"                           : LOCATION   = LC8_L44;
    ":5"                           : LOCATION   = LC3_F39;

END;

INTERNAL_INFO "reg1"
BEGIN
	DEVICE = EP1K100QC208-3;
    OD5P79  : LORAX = "1:FB5->LC1_D15,->LC1_C20,->LC8_L44,->LC3_F39|";
    OD2P78  : LORAX = "1:FB2->LC1_D15,->LC1_C20,->LC8_L44,->LC3_F39|";
    OD4P183 : LORAX = "1:FB4|2:CH0R3,PA12R3C14->LC1_D15||";
    OD3P80  : LORAX = "1:FB3|2:FH3R2,PA13R2C19->LC1_C20||";
    OD1P182 : LORAX = "1:FB1|2:FH1R11,PA15R11C43->LC8_L44||";
    OD0P184 : LORAX = "1:FB0|2:FH0R5,PA16R5C38->LC3_F39||";
    LC1_D15 : LORAX = "1:MSW0R3C14,HHL47R3->OH8R3P135|";
    LC1_C20 : LORAX = "1:MSW0R2C19,HHL48R2->OH8R2P141|";
    LC8_L44 : LORAX = "1:MSW4R11C42,HHR74R11->OH4R11P46|";
    LC3_F39 : LORAX = "1:MSW2R5C38,G77R5->OH2R5P26|";
	LC1_D15 : LORAX2 = "OD4P183, X, X, X";
	LC1_C20 : LORAX2 = "OD3P80, X, X, X";
	LC8_L44 : LORAX2 = "OD1P182, X, X, X";
	LC3_F39 : LORAX2 = "OD0P184, X, X, X";
END;