dac.hif

DDS知识解析

sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
sld_attribute_mem_mode
OFF
PARAMETER_UNKNOWN
USR
SLD_STORAGE_QUALIFIER_BITS
1
PARAMETER_SIGNED_DEC
DEF
SLD_STORAGE_QUALIFIER_GAP_RECORD
0
PARAMETER_SIGNED_DEC
DEF
SLD_STORAGE_QUALIFIER_MODE
OFF
PARAMETER_STRING
DEF
SLD_STORAGE_QUALIFIER_ENABLE_ADVANCED_CONDITION
0
PARAMETER_SIGNED_DEC
DEF
sld_storage_qualifier_inversion_mask_length
0
PARAMETER_UNKNOWN
USR
SLD_STORAGE_QUALIFIER_ADVANCED_CONDITION_ENTITY
basic
PARAMETER_STRING
DEF
SLD_STORAGE_QUALIFIER_PIPELINE
0
PARAMETER_SIGNED_DEC
DEF
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|DAC.(9).cnf
db|DAC.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_signaltap.vhd
1acad66a26c948ca4cfdc53c9dc26d
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
12
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
12
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
61347
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
39194
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
1024
PARAMETER_SIGNED_DEC
USR
sld_segment_size
1024
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
60
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
sld_attribute_mem_mode
OFF
PARAMETER_STRING
USR
sld_storage_qualifier_bits
1
PARAMETER_SIGNED_DEC
USR
sld_storage_qualifier_gap_record
0
PARAMETER_SIGNED_DEC
USR
sld_storage_qualifier_mode
OFF
PARAMETER_STRING
USR
sld_storage_qualifier_enable_advanced_condition
0
PARAMETER_SIGNED_DEC
USR
sld_storage_qualifier_inversion_mask_length
0
PARAMETER_SIGNED_DEC
USR
sld_storage_qualifier_advanced_condition_entity
basic
PARAMETER_STRING
USR
sld_storage_qualifier_pipeline
0
PARAMETER_SIGNED_DEC
USR
 constraint(sld_ram_block_type)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_entity)
1 to 8
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_1)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_2)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_3)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_4)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_5)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_6)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_7)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_8)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_9)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_advanced_trigger_10)
1 to 4
PARAMETER_STRING
USR
 constraint(sld_inversion_mask)
0 to 59
PARAMETER_STRING
USR
 constraint(sld_state_flow_mgr_entity)
1 to 25
PARAMETER_STRING
USR
 constraint(sld_attribute_mem_mode)
1 to 3
PARAMETER_STRING
USR
 constraint(sld_storage_qualifier_mode)
1 to 3
PARAMETER_STRING
USR
 constraint(sld_storage_qualifier_advanced_condition_entity)
1 to 5
PARAMETER_STRING
USR
 constraint(acq_data_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(acq_storage_qualifier_in)
0 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
11 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
11 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|DAC.(10).cnf
db|DAC.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_ela_control.vhd
d8472ae6862788bb44dafc53b92bdac4
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
12
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
0
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
10
PARAMETER_SIGNED_DEC
USR
sample_depth
1024
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
10
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
storage_qualifier_width
1
PARAMETER_SIGNED_DEC
USR
storage_qualifier_mode
OFF
PARAMETER_STRING
USR
storage_qualifier_enable_advanced_condition
0
PARAMETER_SIGNED_DEC
USR
storage_qualifier_inversion_mask_length
0
PARAMETER_SIGNED_DEC
USR
storage_qualifier_advanced_condition_entity
basic
PARAMETER_STRING
USR
storage_qualifier_pipeline
0
PARAMETER_SIGNED_DEC
USR
 constraint(advanced_trigger_entity)
1 to 8
PARAMETER_STRING
USR
 constraint(inversion_mask)
59 downto 59
PARAMETER_STRING
USR
 constraint(state_flow_mgr_entity)
1 to 25
PARAMETER_STRING
USR
 constraint(storage_qualifier_mode)
1 to 3
PARAMETER_STRING
USR
 constraint(storage_qualifier_advanced_condition_entity)
1 to 5
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(storage_qualifier_in)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
9 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|program files|altera|81|quartus|libraries|megafunctions|sld_signaltap.vhd
1acad66a26c948ca4cfdc53c9dc26d
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|DAC.(11).cnf
db|DAC.(11).cnf
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
66a9a824c0947483de17973f96f773e
7
# user_parameter {
LPM_WIDTH
4
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|program files|altera|81|quartus|libraries|megafunctions|aglobal81.inc
ba79644cade9dcbd5df4af72a9b02986
e:|program files|altera|81|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|program files|altera|81|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# macro_sequence

# end
# entity
sld_ela_basic_multi_level_trigger
# storage
db|DAC.(12).cnf
db|DAC.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_ela_control.vhd
d8472ae6862788bb44dafc53b92bdac4
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
data_bits
12
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
 constraint(inversion_mask)
0 downto 0
PARAMETER_STRING
USR
 constraint(data_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(trigger_level_match_out)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|program files|altera|81|quartus|libraries|megafunctions|sld_signaltap.vhd
1acad66a26c948ca4cfdc53c9dc26d
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|DAC.(13).cnf
db|DAC.(13).cnf
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
66a9a824c0947483de17973f96f773e
7
# user_parameter {
LPM_WIDTH
36
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
SHIFTOUT
-1
3
SHIFTIN
-1
3
Q9
-1
3
Q8
-1
3
Q7
-1
3
Q6
-1
3
Q5
-1
3
Q4
-1
3
Q35
-1
3
Q34
-1
3
Q33
-1
3
Q32
-1
3
Q31
-1
3
Q30
-1
3
Q3
-1
3
Q29
-1
3
Q28
-1
3
Q27
-1
3
Q26
-1
3
Q25
-1
3
Q24
-1
3
Q23
-1
3
Q22
-1
3
Q21
-1
3
Q20
-1
3
Q2
-1
3
Q19
-1
3
Q18
-1
3
Q17
-1
3
Q16
-1
3
Q15
-1
3
Q14
-1
3
Q13
-1
3
Q12
-1
3
Q11
-1
3
Q10
-1
3
Q1
-1
3
Q0
-1
3
ENABLE
-1
3
CLOCK
-1
3
ACLR
-1
3
}
# include_file {
e:|program files|altera|81|quartus|libraries|megafunctions|aglobal81.inc
ba79644cade9dcbd5df4af72a9b02986
e:|program files|altera|81|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|program files|altera|81|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# macro_sequence

# end
# entity
sld_mbpmg
# storage
db|DAC.(14).cnf
db|DAC.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_mbpmg.vhd
60a0f3bf7cb2c5f3685945c80b68e40
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
data_bits
12
PARAMETER_SIGNED_DEC
USR
pattern_bits
3
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
sync_enabled
1
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
 constraint(data_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(pattern_in)
35 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_sbpmg
# storage
db|DAC.(15).cnf
db|DAC.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_mbpmg.vhd
60a0f3bf7cb2c5f3685945c80b68e40
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
async_enabled
0
PARAMETER_SIGNED_DEC
USR
pipeline
1
PARAMETER_SIGNED_DEC
USR
}
# lmf
e:|program files|altera|81|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_trigger_flow_mgr
# storage
db|DAC.(16).cnf
db|DAC.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|program files|altera|81|quartus|libraries|megafunctions|sld_ela_trigger_flow_mgr.vhd
54b4e96651b97ec28a57c8b6d87fce
5
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
segment_size_bits
10
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
 constraint(inversion_mask)
0 downto 0
PARAMETER_STRING
USR
 constraint(condition_met)
0 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
9 downto 0