prev_cmp_dac.qmsg

DDS知识解析

{ "Info" "IFITCC_FITCC_INFO_STANDARD_FIT_COMPILATION_ON" "" "Info: Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance" {  } {  } 0 0 "Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C5Q208C8 " "Info: Device EP2C5Q208C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C5Q208I8 " "Info: Device EP2C5Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8Q208I8 " "Info: Device EP2C8Q208I8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ 1 " "Info: Pin ~ASDO~ is reserved at location 1" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ 2 " "Info: Pin ~nCSO~ is reserved at location 2" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS54p/nCEO~ 108 " "Info: Pin ~LVDS54p/nCEO~ is reserved at location 108" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { ~LVDS54p/nCEO~ } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS54p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 0 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "" 0 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "14 14 " "Warning: No exact pin location assignment(s) for 14 pins of 14 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_clk " "Info: Pin da_clk not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_clk } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 264 728 904 280 "da_clk" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_clk } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[11\] " "Info: Pin da_data\[11\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[11] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[11] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[10\] " "Info: Pin da_data\[10\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[10] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[10] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[9\] " "Info: Pin da_data\[9\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[9] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[9] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[8\] " "Info: Pin da_data\[8\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[8] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[8] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[7\] " "Info: Pin da_data\[7\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[7] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[6\] " "Info: Pin da_data\[6\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[6] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[5\] " "Info: Pin da_data\[5\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[5] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[4\] " "Info: Pin da_data\[4\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[4] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[3\] " "Info: Pin da_data\[3\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[3] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[2\] " "Info: Pin da_data\[2\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[2] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[1\] " "Info: Pin da_data\[1\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[1] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "da_data\[0\] " "Info: Pin da_data\[0\] not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_data[0] } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 72 816 992 88 "da_data\[11..0\]" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_data[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk_in " "Info: Pin clk_in not assigned to an exact location on the device" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { clk_in } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 152 -88 80 168 "clk_in" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_in } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0 0}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_in (placed in PIN 23 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node clk_in (placed in PIN 23 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "clk_div:inst\|clk_reg " "Info: Destination node clk_div:inst\|clk_reg" {  } { { "clk_div.v" "" { Text "C:/Users/admin/Desktop/DDS/DAC/clk_div.v" 17 -1 0 } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_div:inst|clk_reg } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { clk_in } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 152 -88 80 168 "clk_in" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_in } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst\|clk_reg  " "Info: Automatically promoted node clk_div:inst\|clk_reg " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "clk_div:inst\|clk_reg~41 " "Info: Destination node clk_div:inst\|clk_reg~41" {  } { { "clk_div.v" "" { Text "C:/Users/admin/Desktop/DDS/DAC/clk_div.v" 17 -1 0 } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_div:inst|clk_reg~41 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "da_clk " "Info: Destination node da_clk" {  } { { "e:/program files/altera/81/quartus/bin/pin_planner.ppl" "" { PinPlanner "e:/program files/altera/81/quartus/bin/pin_planner.ppl" { da_clk } } } { "DAC.bdf" "" { Schematic "C:/Users/admin/Desktop/DDS/DAC/DAC.bdf" { { 264 728 904 280 "da_clk" "" } } } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { da_clk } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0 "" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "" 0 0}  } { { "clk_div.v" "" { Text "C:/Users/admin/Desktop/DDS/DAC/clk_div.v" 17 -1 0 } } { "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/program files/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_div:inst|clk_reg } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0 "" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0 "" 0 0}  } {  } 0 0 "Finished register packing" 0 0 "" 0 0}