de2_i2sound.tan.summary

基于I2C 的语音采集与播放 Verilog HDL源代码

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.864 ns
From           : i2c:inst|SD_COUNTER[3]
To             : I2C_SCLK
From Clock     : 50MHZ
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 8.933 ns
From           : AUD_ADCDAT
To             : AUD_DACDAT
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: '50MHZ'
Slack          : 14.043 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 167.87 MHz ( period = 5.957 ns )
From           : CLOCK_500:inst4|address[1]
To             : i2c:inst|SD_COUNTER[0]
From Clock     : 50MHZ
To Clock       : 50MHZ
Failed Paths   : 0

Type           : Clock Hold: '50MHZ'
Slack          : 0.381 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : CLOCK_500:inst4|vol[3]
To             : CLOCK_500:inst4|DATA_A[3]
From Clock     : 50MHZ
To Clock       : 50MHZ
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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