📄 de2_i2sound.tan.rpt
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; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Clock Settings ; 50MHZ ; ; 50MHZ ; ;
+-------------------------------------------------------+--------------------+------+-------+-------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; 50MHZ ; 50MHZ ; User Pin ; 50.0 MHz ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: '50MHZ' ;
+-----------------------------------------+-----------------------------------------------------+----------------------------+----------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------+----------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[4] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[3] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[1] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.043 ns ; 167.87 MHz ( period = 5.957 ns ) ; CLOCK_500:inst4|address[1] ; i2c:inst|SD_COUNTER[5] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.320 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[4] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[3] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[1] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.200 ns ; 172.41 MHz ( period = 5.800 ns ) ; CLOCK_500:inst4|address[0] ; i2c:inst|SD_COUNTER[5] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.364 ns ; 2.164 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[4] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[3] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[1] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.247 ns ; 173.82 MHz ( period = 5.753 ns ) ; CLOCK_500:inst4|address[2] ; i2c:inst|SD_COUNTER[5] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.116 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[4] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[3] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[1] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.335 ns ; 176.52 MHz ( period = 5.665 ns ) ; CLOCK_500:inst4|address[4] ; i2c:inst|SD_COUNTER[5] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 2.028 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[4] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[3] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[1] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.443 ns ; 179.95 MHz ( period = 5.557 ns ) ; CLOCK_500:inst4|address[3] ; i2c:inst|SD_COUNTER[5] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.920 ns ;
; 14.613 ns ; 185.63 MHz ( period = 5.387 ns ) ; CLOCK_500:inst4|address[5] ; i2c:inst|SD_COUNTER[0] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.750 ns ;
; 14.613 ns ; 185.63 MHz ( period = 5.387 ns ) ; CLOCK_500:inst4|address[5] ; i2c:inst|SD_COUNTER[2] ; 50MHZ ; 50MHZ ; 20.000 ns ; 16.363 ns ; 1.750 ns ;
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