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📄 vga.h

📁 c语言编的网络操作系统。具备网络操作系统基本功能。
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/*
nexOS: vga.h - SVGA driver header
Copyright 2004 nexOS development team

This file is part of nexOS.

nexOS is free software; you can redistribute it and/or modify
it under the terms of the GNU Lesser General Public License as published by
the Free Software Foundation; either version 2.1 of the License, or
(at your option) any later version.

nexOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU Lesser General Public License for more details.

You should have received a copy of the GNU Lesser General Public License
along with nexOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ 

#ifndef __KERNEL_VGA_H__
#define __KERNEL_VGA_H__

#include <types.h>

typedef struct vga_map_t {
    DWORD start, end;
}VGA_MAP;    

#define VGAMAP(x,y)    ((SVGA_MAP){x, y})

#define MAPMOPE_00 VGAMAP(0xA0000,0xBFFFF)
#define MAPMODE_01 VGAMAP(0xA0000-0xAFFFF)
#define MAPMODE_10 VGAMAP(0xB0000-0xB7FFF)
#define MAPMODE_11 VGAMAP(0xB8000-0xBFFFF)

/* graphics register */
#define GRREG_ADDR   0x3CE
#define GRREG_DATA   0x3CF
#define GRREG_SETRST  0x00    /* Set/Reset register */
#define GRREG_ESTRST  0x01    /* Enable Set/Reset register */
#define GRREG_COLCMP  0x02    /* Color Compare register */
#define GRREG_DATROT  0x03    /* Data Rotate register */
#define GRREG_RDMPSL  0x04    /* Read Map Select register */
#define GRREG_GRPHMD  0x05    /* Graphics Mode register */
#define GRREG_MISCGR  0x06    /* Miscellaneous Graphics register */
#define GRREG_COLDNC  0x07    /* Color Don't Care register */
#define GRREG_BITMSK  0x08    /* Bit Mask register */

/* sequencer register */
#define SQREG_ADDR   0x3C4
#define SQREG_DATA   0x3C5
#define SQREG_RESETR  0x00    /* Reset register */
#define SQREG_CLKMOD  0x01    /* Clocking Mode register */
#define SQREG_MAPMSK  0x02    /* Map Mask register */
#define SQREG_CHMPSL  0x03    /* Character Map Select register */
#define SQREG_MEMMOD  0x04    /* Sequencer Memory Mode register */

/* crtc registers */
#define CRTCR_ADDR1  0x3B4
#define CRTCR_DATA1  0x3B5
#define CRTCR_ADDR2  0x3D4
#define CRTCR_DATA2  0x3D5
#define CRTCR_HRZTOT 0x00    /* Horizontal Total register */
#define CRTCR_EHZDSP 0x01    /* End Horizontal Display register */
#define CRTCR_SHZBLK 0x02    /* Start Horizontal Blanking register */
#define CRTCR_EHZBLK 0x03    /* End Horizontal Blanking register */
#define CRTCR_SHZRET 0x04    /* Start Horizontal Retrace register */
#define CRTCR_EHZRET 0x05    /* End Horizontal Retrace register */
#define CRTCR_VRTTOT 0x06    /* Vertical Total register */
#define CRTCR_OVRFLW 0x07    /* Overflow register */
#define CRTCR_PRSTRS 0x08    /* Preset Row Scan register */
#define CRTCR_MAXSCL 0x09    /* Maximum Scan Line register */
#define CRTCR_CURSTR 0x0A    /* Cursor Start register */
#define CRTCR_CUREND 0x0B    /* Cursor End register */
#define CRTCR_STADRH 0x0C    /* Start Address High register */
#define CRTCR_STADRL 0x0D    /* Start Address Low register */
#define CRTCR_CURLCH 0x0E    /* Cursor Location High register */
#define CRTCR_CURLCL 0x0F    /* Cursor Location Low register */
#define CRTCR_SVTRET 0x10    /* Start Vertical Retrace register */
#define CRTCR_EVTRET 0x11    /* End Vertical Retrace register */
#define CRTCR_EVTDSP 0x12    /* End Vertical Display register */
#define CRTCR_OFFSET 0x13    /* Offset register */
#define CRTCR_UNDLLC 0x14    /* Underline Location register */
#define CRTCR_SVTBLK 0x15    /* Start Vertical Blanking register */
#define CRTCR_EVTBLK 0x16    /* End Vertical Blanking register */
#define CRTCR_MODCNT 0x17    /* CRTC Mode Control register */
#define CRTCR_LINCMP 0x18    /* Line Compare register */

/* DAC register */
#define DACRG_RESET  0x3C6 
#define DACRG_WMADDR 0x3C8
#define DACRG_RMADDR 0x3C7
#define DACRG_DATA   0x3C9
#define DACRG_STATE  0x3C7

/* attribute controller */
#define	ATTRC_ADDR		0x3C0
#define	ATTRC_WRITE		0x3C0
#define	ATTRC_READ		0x3C1

/* external registers */
#define MISCO_READ   0x3CC    /* Miscellaneous Output (read) register */
#define MISCO_WRITE  0x3C2    /* Miscellaneous Output (write) register */
#define FEATC_READ        0x3CA    /* Feature Control Register (read) register */
#define FEATC_WRITE_MONO  0x3BA    /* Feature Control Register (write mono) register */
#define FEATC_WRITE_COLOR 0x3DA    /* Feature Control Register (write color) register */
#define INPST_0      0x3C2    /* Input Status #0 register */
#define INPST_1MONO  0x3BA    /* Input Status #1 (mono) register */
#define INPST_1COLOR 0x3DA    /* Input Status #1 (color) register */


typedef struct vgamode_t {
    DWORD w;
    DWORD h;
    DWORD bpp;
    void *putpixel;
    void *setpal;
    void *setpalent;
    const unsigned char* initregs;
} VGAMODE;

int vga_init();
void vga_fini();

VGAMODE vga_getmodeinfo(int mode);
int vga_changemode(int mode);
void vga_setpalette(const unsigned char *palettearray);
void vga_setpalentry(BYTE index, BYTE r, BYTE g, BYTE b);

#define VGA_RECT_NOFILL 0
#define VGA_RECT_FILL   1
/* primitives */
void vga_putpixel(int x, int y, int color);
void vga_line(int x1, int y1, int x2, int y2, int color);
void vga_rect(int x1, int y1, int x2, int y2, int color, int mode);

#endif

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