📄 sfr_7546.h
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/****************************************************************************
* *
* file name : sfr_7546.h *
* *
* Version : 1.00 ( 2005-10-11 ) Initial *
* *
* Copyright(C) 2005. Renesas Technology Corp., All rights reserved. *
* *
*****************************************************************************/
/*
note:
This data is a freeware that SFR for 7546 Group is described.
RENESAS TECHNOLOGY CORPORATION assumes no responsibility for any damage
that occurred by this data.
*/
#ifndef Chip_7546
#define Chip_7546
#endif
#pragma language=extended
/*===================================
* Special function registers (SFR)
*===================================
*/
sfr P0 = 0x00000; /* Port P0 */
sfr P0D = 0x00001; /* Port P0 direction register */
sfr P1 = 0x00002; /* Port P1 */
sfr P1D = 0x00003; /* Port P1 direction register */
sfr P2 = 0x00004; /* Port P2 */
sfr P2D = 0x00005; /* Port P2 direction register */
sfr P3 = 0x00006; /* Port P3 */
sfr P3D = 0x00007; /* Port P3 direction register */
sfr INTSET = 0x0000a; /* Interrupt source set register */
sfr INTDIS = 0x0000b; /* Interrupt source discrimination register */
sfr CAP0L = 0x0000c; /* Capture register 0 (low-order) */
sfr CAP0H = 0x0000d; /* Capture register 0 (high-order) */
sfr CAP1L = 0x0000e; /* Capture register 1 (low-order) */
sfr CAP1H = 0x0000f; /* Capture register 1 (high-order) */
sfr CMPL = 0x00010; /* Compare register (low-order) */
sfr CMPH = 0x00011; /* Compare register (high-order) */
sfr CCRP = 0x00012; /* Capture/compare register R/W pointer */
sfr CSTR = 0x00013; /* Capture software trigger register */
sfr CMPR = 0x00014; /* Compare register re-load register */
sfr DCCR = 0x00015; /* Port P0P3 drive capacity control register */
sfr PULL = 0x00016; /* Pull-up control register */
sfr P1P3C = 0x00017; /* Port P1P3 control register */
sfr TB1RB1 = 0x00018; /* Transmit 1 /Receive 1 buffer register */
sfr SIO1STS = 0x00019; /* Serial I/O1 status register */
sfr SIO1CON = 0x0001a; /* Serial I/O1 control register */
sfr UART1CON = 0x0001b; /* UART1 control register */
sfr BRG1 = 0x0001c; /* Baud rate generator 1 */
sfr TABM = 0x0001d; /* Timer A, B mode register */
sfr CCPR = 0x0001e; /* Capture/compare port register */
sfr TMSR = 0x0001f; /* Timer source selection register */
sfr CAPM = 0x00020; /* Capture mode register */
sfr CMOM = 0x00021; /* Compare output mode register */
sfr CCSR = 0x00022; /* Capture/compare status register */
sfr CISR = 0x00023; /* Compare interrupt source set register */
sfr TAL = 0x00024; /* Timer A (low-order) */
sfr TAH = 0x00025; /* Timer A (high-order) */
sfr TBL = 0x00026; /* Timer B (low-order) */
sfr TBH = 0x00027; /* Timer B (high-order) */
sfr PRE1 = 0x00028; /* Prescaler 1 */
sfr T1 = 0x00029; /* Timer 1 */
sfr TCSS = 0x0002a; /* Timer count source set register */
sfr TXM = 0x0002b; /* Timer X mode register */
sfr PREX = 0x0002c; /* Prescaler X */
sfr TX = 0x0002d; /* Timer X */
sfr TB2RB2 = 0x0002e; /* Transmit 2 / Receive 2 buffer register */
sfr SIO2STS = 0x0002f; /* Serial I/O2 status register */
sfr SIO2CON = 0x00030; /* Serial I/O2 control register */
sfr UART2CON = 0x00031; /* UART2 control register */
sfr BRG2 = 0x00032; /* Baud rate generator 2 */
sfr ADCON = 0x00034; /* A-D control register */
sfr ADL = 0x00035; /* A-D conversion register (low-order) */
sfr ADH = 0x00036; /* A-D conversion register (high-order) */
sfr RODR = 0x00037; /* On-chip oscillation division ratio selection register */
sfr MISRG = 0x00038; /* MISRG */
sfr WDTCON = 0x00039; /* Watchdog timer control register */
sfr INTEDGE = 0x0003a; /* Interrupt edge selection register */
sfr CPUM = 0x0003b; /* CPU mode register */
sfr IREQ1 = 0x0003c; /* Interrupt request register 1 */
sfr IREQ2 = 0x0003d; /* Interrupt request register 2 */
sfr ICON1 = 0x0003e; /* Interrupt control register 1 */
sfr ICON2 = 0x0003f; /* Interrupt control register 2 */
#ifdef __IAR_SYSTEMS_ICC__
/*------------------------------------------------------
Port P0 register (0000H)
------------------------------------------------------*/
bit P0_0 = P0.0; /* P0 register bit0 */
bit P0_1 = P0.1; /* P0 register bit1 */
bit P0_2 = P0.2; /* P0 register bit2 */
bit P0_3 = P0.3; /* P0 register bit3 */
bit P0_4 = P0.4; /* P0 register bit4 */
bit P0_5 = P0.5; /* P0 register bit5 */
bit P0_6 = P0.6; /* P0 register bit6 */
bit P0_7 = P0.7; /* P0 register bit7 */
/*------------------------------------------------------
Port P1 register (0002H)
------------------------------------------------------*/
bit P1_0 = P1.0; /* P1 register bit0 */
bit P1_1 = P1.1; /* P1 register bit1 */
bit P1_2 = P1.2; /* P1 register bit2 */
bit P1_3 = P1.3; /* P1 register bit3 */
bit P1_4 = P1.4; /* P1 register bit4 */
/*------------------------------------------------------
Port P2 register (0004H)
------------------------------------------------------*/
bit P2_0 = P2.0; /* P2 register bit0 */
bit P2_1 = P2.1; /* P2 register bit1 */
bit P2_2 = P2.2; /* P2 register bit2 */
bit P2_3 = P2.3; /* P2 register bit3 */
bit P2_4 = P2.4; /* P2 register bit4 */
bit P2_5 = P2.5; /* P2 register bit5 */
/*------------------------------------------------------
Port P3 register (0006H)
------------------------------------------------------*/
bit P3_0 = P3.0; /* P3 register bit0 */
bit P3_1 = P3.1; /* P3 register bit1 */
bit P3_2 = P3.2; /* P3 register bit2 */
bit P3_3 = P3.3; /* P3 register bit3 */
bit P3_4 = P3.4; /* P3 register bit4 */
bit P3_7 = P3.7; /* P3 register bit7 */
#endif
/*------------------------------------------------------
P0P3 drive capacity control Register (0015H)
------------------------------------------------------*/
bit DRR0 = DCCR.0; /* Port P00 Drive Capacity Bit */
bit DRR1 = DCCR.1; /* Port P03-P07 Drive Capacity Bit */
bit DRR3 = DCCR.3; /* Port P30 Drive Capacity Bit */
bit DRR4 = DCCR.4; /* Port P31,P32 Drive Capacity Bit */
bit DRR5 = DCCR.5; /* Port P33 Drive Capacity Bit */
bit DRR6 = DCCR.6; /* Port P34,P35 Drive Capacity Bit */
bit DRR7 = DCCR.7; /* Port P36,P37 Drive Capacity Bit */
/*------------------------------------------------------
Pull-up Control Register (0016H)
------------------------------------------------------*/
bit PU00 = PULL.0; /* P00 Pull-up Control Bit */
bit PU01 = PULL.1; /* P01,P02 Pull-up Control Bit */
bit PU02 = PULL.2; /* P03-P07 Pull-up Control Bit */
bit PU03 = PULL.3; /* P30 Pull-up Control Bit */
bit PU04 = PULL.4; /* P31,P32 Pull-up Control Bit */
bit PU05 = PULL.5; /* P33 Pull-up Control Bit */
bit PU06 = PULL.6; /* P34,P35 Pull-up Control Bit */
bit PU07 = PULL.7; /* P36,P37 Pull-up Control Bit */
/*------------------------------------------------------
Port P1P3 control Register (0017H)
------------------------------------------------------*/
bit CMOST0 = P1P3C.0; /* P37/INT0 Input Level Selection Bit */
bit CMOST1 = P1P3C.1; /* P36/INT1 Input Level Selection Bit */
bit CMOST2 = P1P3C.2; /* P10,P12,P13 Input Level Selection Bit */
/*------------------------------------------------------
Timer A,B Mode Register (001DH)
------------------------------------------------------*/
bit TAWC = TABM.0; /* Timer A Write Control Bit */
bit TASTP = TABM.1; /* Timer A Count Stop Bit */
bit TBWC = TABM.2; /* Timer B Write Control Bit */
bit TBSTP = TABM.3; /* Timer B Count stop Control Bit */
bit CMM01 = TABM.6; /* Compare 0,1 Modulation Mode Bit */
bit CMM23 = TABM.7; /* Compare 2,3 Modulation Mode Bit */
/*------------------------------------------------------
Compare Register Re-load Register (0014H)
------------------------------------------------------*/
bit CMPR0 = CMPR.0; /* Compare Latch 00,01 Re-load Bit */
bit CMPR1 = CMPR.1; /* Compare Latch 10,11 Re-load Bit */
bit CMPR2 = CMPR.2; /* Compare Latch 20,21 Re-load Bit */
bit CMPR3 = CMPR.3; /* Compare Latch 30,31 Re-load Bit */
/*------------------------------------------------------
Capture/Compare Register (0012H)
------------------------------------------------------*/
bit CCRP0 = CCRP.0; /* Compare Register R/W Pointer Bit s(0-3) */
bit CCRP1 = CCRP.1; /* */
bit CCRP2 = CCRP.2; /* */
bit CCRP4 = CCRP.4; /* Capture 0 Register R/W Pointer Bit */
bit CCRP5 = CCRP.5; /* Capture 1 Register R/W Pointer Bit */
/*------------------------------------------------------
Capture Software Trigger Register (0013H)
------------------------------------------------------*/
bit CSTR0 = CSTR.0; /* Capture Latch 00 Software Trigger Bit */
bit CSTR1 = CSTR.1; /* Capture Latch 01 Software Trigger Bit */
bit CSTR2 = CSTR.2; /* Capture Latch 10 Software Trigger Bit */
bit CSTR3 = CSTR.3; /* Capture Latch 11 Software Trigger Bit */
/*------------------------------------------------------
Capture/Compare Port Register (001EH)
------------------------------------------------------*/
bit CCPR0 = CCPR.0; /* Capture 0 Input Port Bit s(0-1) */
bit CCPR1 = CCPR.1; /* */
bit CCPR2 = CCPR.2; /* Capture 0 Output Port Bit */
bit CCPR3 = CCPR.3; /* Capture 1 Output Port Bit */
bit CCPR4 = CCPR.4; /* Capture 1 Input Port Bit */
bit CCPR5 = CCPR.5; /* Capture 2 Output Port Bit */
bit CCPR6 = CCPR.6; /* Capture 3 Output Port Bit */
/*------------------------------------------------------
Timer Source Selection Register (001FH)
------------------------------------------------------*/
bit TMSR0 = TMSR.0; /* Compare 0 Timer Source Bit */
bit TMSR1 = TMSR.1; /* Compare 1 Timer Source Bit */
bit TMSR2 = TMSR.2; /* Compare 2 Timer Source Bit */
bit TMSR3 = TMSR.3; /* Compare 3 Timer Source Bit */
bit TMSR4 = TMSR.4; /* Capture 0 Timer Source Bit */
bit TMSR5 = TMSR.5; /* Capture 1 Timer Source Bit */
/*------------------------------------------------------
Capture Mode Register (0020H)
------------------------------------------------------*/
bit CAP0EG0 = CAPM.0; /* Capture 0 Interrupt Edge Selection Bit s(0,1) */
bit CAP0EG1 = CAPM.1; /* */
bit CAP1EG0 = CAPM.2; /* Capture 1 Interrupt Edge Selection Bit s(2,3) */
bit CAP1EG1 = CAPM.3; /* */
bit CAP0FC0 = CAPM.4; /* Capture 0 Noise Filter Clock Selection Bit s(4,5) */
bit CAP0FC1 = CAPM.5; /* */
bit CAP1FC0 = CAPM.6; /* Capture 1 Noise Filter Clock Selection Bit s(6,7) */
bit CAP1FC1 = CAPM.7; /* */
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