pck_crc16_d1.vhd

来自「这是一个SD卡的TESTBENCH,源码中有如何产生一个特定的命令序列的样例。支」· VHDL 代码 · 共 65 行

-----------------------------------------------------------------------
-- File:  PCK_CRC16_D1.vhd                              
-- Date:  Mon May 19  2008                                                      
                                                                  


library IEEE;
use IEEE.std_logic_1164.all;

package PCK_CRC16_D1 is

  -- polynomial: (0 5 12 16)
  -- data width: 1
  function nextCRC16_D1
    ( Data:  std_logic;
      CRC:   std_logic_vector(15 downto 0) )
    return std_logic_vector;

end PCK_CRC16_D1;

library IEEE;
use IEEE.std_logic_1164.all;

package body PCK_CRC16_D1 is

  -- polynomial: (0 5 12 16)
  -- data width: 1
  function nextCRC16_D1 
    ( Data:  std_logic;
      CRC:   std_logic_vector(15 downto 0) )
    return std_logic_vector is

    variable D: std_logic_vector(0 downto 0);
    variable C: std_logic_vector(15 downto 0);
    variable NewCRC: std_logic_vector(15 downto 0);

  begin

    D(0) := Data;
    C := CRC;

    NewCRC(0) := D(0) xor C(15);
    NewCRC(1) := C(0);
    NewCRC(2) := C(1);
    NewCRC(3) := C(2);
    NewCRC(4) := C(3);
    NewCRC(5) := D(0) xor C(4) xor C(15);
    NewCRC(6) := C(5);
    NewCRC(7) := C(6);
    NewCRC(8) := C(7);
    NewCRC(9) := C(8);
    NewCRC(10) := C(9);
    NewCRC(11) := C(10);
    NewCRC(12) := D(0) xor C(11) xor C(15);
    NewCRC(13) := C(12);
    NewCRC(14) := C(13);
    NewCRC(15) := C(14);

    return NewCRC;

  end nextCRC16_D1;

end PCK_CRC16_D1;