📄 cnt8.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT8 IS
PORT (
CLK, LD : IN STD_LOGIC;
D : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
CAO : OUT STD_LOGIC
);
END CNT8;
ARCHITECTURE behav OF CNT8 IS
SIGNAL COUNT : STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
PROCESS( CLK )
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
IF LD = '1' THEN
COUNT <= D;
ELSE
COUNT <= COUNT - 1;
END IF;
END IF;
END PROCESS;
CAO<='1' WHEN COUNT="0000" ELSE '0';
END behav;
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