mc9s12hz256.c

Demo HZ256 Cluster LCD2 CW31 SH v1 ICD

/* Based on CPU DB MC9S12HZ256, version 2.87.325 (RegistersPrg V1.094) */
/* DataSheet : 9S12HZ256DGV1/D V01.02 */

#include <MC9S12HZ256.h>


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register */
volatile ATDSTAT0STR _ATDSTAT0;                            /* ATD Status Register 0 */
volatile ATDSTAT1STR _ATDSTAT1;                            /* ATD Status Register 1 */
volatile ATDSTAT2STR _ATDSTAT2;                            /* ATD Status Register 2 */
volatile ATDTEST1STR _ATDTEST1;                            /* ATD Test Register */
volatile CAN0BTR0STR _CAN0BTR0;                            /* MSCAN 0 Bus Timing Register 0 */
volatile CAN0BTR1STR _CAN0BTR1;                            /* MSCAN 0 Bus Timing Register 1 */
volatile CAN0CTL0STR _CAN0CTL0;                            /* MSCAN 0 Control 0 Register */
volatile CAN0CTL1STR _CAN0CTL1;                            /* MSCAN 0 Control 1 Register */
volatile CAN0IDACSTR _CAN0IDAC;                            /* MSCAN 0 Identifier Acceptance Control Register */
volatile CAN0IDAR0STR _CAN0IDAR0;                          /* MSCAN 0 Identifier Acceptance Register 0 */
volatile CAN0IDAR1STR _CAN0IDAR1;                          /* MSCAN 0 Identifier Acceptance Register 1 */
volatile CAN0IDAR2STR _CAN0IDAR2;                          /* MSCAN 0 Identifier Acceptance Register 2 */
volatile CAN0IDAR3STR _CAN0IDAR3;                          /* MSCAN 0 Identifier Acceptance Register 3 */
volatile CAN0IDAR4STR _CAN0IDAR4;                          /* MSCAN 0 Identifier Acceptance Register 4 */
volatile CAN0IDAR5STR _CAN0IDAR5;                          /* MSCAN 0 Identifier Acceptance Register 5 */
volatile CAN0IDAR6STR _CAN0IDAR6;                          /* MSCAN 0 Identifier Acceptance Register 6 */
volatile CAN0IDAR7STR _CAN0IDAR7;                          /* MSCAN 0 Identifier Acceptance Register 7 */
volatile CAN0IDMR0STR _CAN0IDMR0;                          /* MSCAN 0 Identifier Mask Register 0 */
volatile CAN0IDMR1STR _CAN0IDMR1;                          /* MSCAN 0 Identifier Mask Register 1 */
volatile CAN0IDMR2STR _CAN0IDMR2;                          /* MSCAN 0 Identifier Mask Register 2 */
volatile CAN0IDMR3STR _CAN0IDMR3;                          /* MSCAN 0 Identifier Mask Register 3 */
volatile CAN0IDMR4STR _CAN0IDMR4;                          /* MSCAN 0 Identifier Mask Register 4 */
volatile CAN0IDMR5STR _CAN0IDMR5;                          /* MSCAN 0 Identifier Mask Register 5 */
volatile CAN0IDMR6STR _CAN0IDMR6;                          /* MSCAN 0 Identifier Mask Register 6 */
volatile CAN0IDMR7STR _CAN0IDMR7;                          /* MSCAN 0 Identifier Mask Register 7 */
volatile CAN0RFLGSTR _CAN0RFLG;                            /* MSCAN 0 Receiver Flag Register */
volatile CAN0RIERSTR _CAN0RIER;                            /* MSCAN 0 Receiver Interrupt Enable Register */
volatile CAN0RXDLRSTR _CAN0RXDLR;                          /* MSCAN 0 Receive Data Length Register */
volatile CAN0RXDSR0STR _CAN0RXDSR0;                        /* MSCAN 0 Receive Data Segment Register 0 */
volatile CAN0RXDSR1STR _CAN0RXDSR1;                        /* MSCAN 0 Receive Data Segment Register 1 */
volatile CAN0RXDSR2STR _CAN0RXDSR2;                        /* MSCAN 0 Receive Data Segment Register 2 */
volatile CAN0RXDSR3STR _CAN0RXDSR3;                        /* MSCAN 0 Receive Data Segment Register 3 */
volatile CAN0RXDSR4STR _CAN0RXDSR4;                        /* MSCAN 0 Receive Data Segment Register 4 */
volatile CAN0RXDSR5STR _CAN0RXDSR5;                        /* MSCAN 0 Receive Data Segment Register 5 */
volatile CAN0RXDSR6STR _CAN0RXDSR6;                        /* MSCAN 0 Receive Data Segment Register 6 */
volatile CAN0RXDSR7STR _CAN0RXDSR7;                        /* MSCAN 0 Receive Data Segment Register 7 */
volatile CAN0RXERRSTR _CAN0RXERR;                          /* MSCAN 0 Receive Error Counter Register */
volatile CAN0RXIDR0STR _CAN0RXIDR0;                        /* MSCAN 0 Receive Identifier Register 0 */
volatile CAN0RXIDR1STR _CAN0RXIDR1;                        /* MSCAN 0 Receive Identifier Register 1 */
volatile CAN0RXIDR2STR _CAN0RXIDR2;                        /* MSCAN 0 Receive Identifier Register 2 */
volatile CAN0RXIDR3STR _CAN0RXIDR3;                        /* MSCAN 0 Receive Identifier Register 3 */
volatile CAN0TAAKSTR _CAN0TAAK;                            /* MSCAN 0 Transmitter Message Abort Control */
volatile CAN0TARQSTR _CAN0TARQ;                            /* MSCAN 0 Transmitter Message Abort Request */
volatile CAN0TBSELSTR _CAN0TBSEL;                          /* MSCAN 0 Transmit Buffer Selection */
volatile CAN0TFLGSTR _CAN0TFLG;                            /* MSCAN 0 Transmitter Flag Register */
volatile CAN0TIERSTR _CAN0TIER;                            /* MSCAN 0 Transmitter Interrupt Enable Register */
volatile CAN0TXDLRSTR _CAN0TXDLR;                          /* MSCAN 0 Transmit Data Length Register */
volatile CAN0TXDSR0STR _CAN0TXDSR0;                        /* MSCAN 0 Transmit Data Segment Register 0 */
volatile CAN0TXDSR1STR _CAN0TXDSR1;                        /* MSCAN 0 Transmit Data Segment Register 1 */
volatile CAN0TXDSR2STR _CAN0TXDSR2;                        /* MSCAN 0 Transmit Data Segment Register 2 */
volatile CAN0TXDSR3STR _CAN0TXDSR3;                        /* MSCAN 0 Transmit Data Segment Register 3 */
volatile CAN0TXDSR4STR _CAN0TXDSR4;                        /* MSCAN 0 Transmit Data Segment Register 4 */
volatile CAN0TXDSR5STR _CAN0TXDSR5;                        /* MSCAN 0 Transmit Data Segment Register 5 */
volatile CAN0TXDSR6STR _CAN0TXDSR6;                        /* MSCAN 0 Transmit Data Segment Register 6 */
volatile CAN0TXDSR7STR _CAN0TXDSR7;                        /* MSCAN 0 Transmit Data Segment Register 7 */
volatile CAN0TXERRSTR _CAN0TXERR;                          /* MSCAN 0 Transmit Error Counter Register */
volatile CAN0TXIDR0STR _CAN0TXIDR0;                        /* MSCAN 0 Transmit Identifier Register 0 */
volatile CAN0TXIDR1STR _CAN0TXIDR1;                        /* MSCAN 0 Transmit Identifier Register 1 */
volatile CAN0TXIDR2STR _CAN0TXIDR2;                        /* MSCAN 0 Transmit Identifier Register 2 */
volatile CAN0TXIDR3STR _CAN0TXIDR3;                        /* MSCAN 0 Transmit Identifier Register 3 */
volatile CAN0TXTBPRSTR _CAN0TXTBPR;                        /* MSCAN 0 Transmit Buffer Priority */
volatile CAN1BTR0STR _CAN1BTR0;                            /* MSCAN 1 Bus Timing Register 0 */
volatile CAN1BTR1STR _CAN1BTR1;                            /* MSCAN 1 Bus Timing Register 1 */
volatile CAN1CTL0STR _CAN1CTL0;                            /* MSCAN 1 Control 0 Register */
volatile CAN1CTL1STR _CAN1CTL1;                            /* MSCAN 1 Control 1 Register */
volatile CAN1IDACSTR _CAN1IDAC;                            /* MSCAN 1 Identifier Acceptance Control Register */
volatile CAN1IDAR0STR _CAN1IDAR0;                          /* MSCAN 1 Identifier Acceptance Register 0 */
volatile CAN1IDAR1STR _CAN1IDAR1;                          /* MSCAN 1 Identifier Acceptance Register 1 */
volatile CAN1IDAR2STR _CAN1IDAR2;                          /* MSCAN 1 Identifier Acceptance Register 2 */
volatile CAN1IDAR3STR _CAN1IDAR3;                          /* MSCAN 1 Identifier Acceptance Register 3 */
volatile CAN1IDAR4STR _CAN1IDAR4;                          /* MSCAN 1 Identifier Acceptance Register 4 */
volatile CAN1IDAR5STR _CAN1IDAR5;                          /* MSCAN 1 Identifier Acceptance Register 5 */
volatile CAN1IDAR6STR _CAN1IDAR6;                          /* MSCAN 1 Identifier Acceptance Register 6 */
volatile CAN1IDAR7STR _CAN1IDAR7;                          /* MSCAN 1 Identifier Acceptance Register 7 */
volatile CAN1IDMR0STR _CAN1IDMR0;                          /* MSCAN 1 Identifier Mask Register 0 */
volatile CAN1IDMR1STR _CAN1IDMR1;                          /* MSCAN 1 Identifier Mask Register 1 */
volatile CAN1IDMR2STR _CAN1IDMR2;                          /* MSCAN 1 Identifier Mask Register 2 */
volatile CAN1IDMR3STR _CAN1IDMR3;                          /* MSCAN 1 Identifier Mask Register 3 */
volatile CAN1IDMR4STR _CAN1IDMR4;                          /* MSCAN 1 Identifier Mask Register 4 */
volatile CAN1IDMR5STR _CAN1IDMR5;                          /* MSCAN 1 Identifier Mask Register 5 */
volatile CAN1IDMR6STR _CAN1IDMR6;                          /* MSCAN 1 Identifier Mask Register 6 */
volatile CAN1IDMR7STR _CAN1IDMR7;                          /* MSCAN 1 Identifier Mask Register 7 */
volatile CAN1RFLGSTR _CAN1RFLG;                            /* MSCAN 1 Receiver Flag Register */
volatile CAN1RIERSTR _CAN1RIER;                            /* MSCAN 1 Receiver Interrupt Enable Register */
volatile CAN1RXDLRSTR _CAN1RXDLR;                          /* MSCAN 1 Receive Data Length Register */
volatile CAN1RXDSR0STR _CAN1RXDSR0;                        /* MSCAN 1 Receive Data Segment Register 0 */
volatile CAN1RXDSR1STR _CAN1RXDSR1;                        /* MSCAN 1 Receive Data Segment Register 1 */
volatile CAN1RXDSR2STR _CAN1RXDSR2;                        /* MSCAN 1 Receive Data Segment Register 2 */
volatile CAN1RXDSR3STR _CAN1RXDSR3;                        /* MSCAN 1 Receive Data Segment Register 3 */
volatile CAN1RXDSR4STR _CAN1RXDSR4;                        /* MSCAN 1 Receive Data Segment Register 4 */
volatile CAN1RXDSR5STR _CAN1RXDSR5;                        /* MSCAN 1 Receive Data Segment Register 5 */
volatile CAN1RXDSR6STR _CAN1RXDSR6;                        /* MSCAN 1 Receive Data Segment Register 6 */
volatile CAN1RXDSR7STR _CAN1RXDSR7;                        /* MSCAN 1 Receive Data Segment Register 7 */
volatile CAN1RXERRSTR _CAN1RXERR;                          /* MSCAN 1 Receive Error Counter Register */
volatile CAN1RXIDR0STR _CAN1RXIDR0;                        /* MSCAN 1 Receive Identifier Register 0 */
volatile CAN1RXIDR1STR _CAN1RXIDR1;                        /* MSCAN 1 Receive Identifier Register 1 */
volatile CAN1RXIDR2STR _CAN1RXIDR2;                        /* MSCAN 1 Receive Identifier Register 2 */
volatile CAN1RXIDR3STR _CAN1RXIDR3;                        /* MSCAN 1 Receive Identifier Register 3 */
volatile CAN1TAAKSTR _CAN1TAAK;                            /* MSCAN 1 Transmitter Message Abort Control */
volatile CAN1TARQSTR _CAN1TARQ;                            /* MSCAN 1 Transmitter Message Abort Request */
volatile CAN1TBSELSTR _CAN1TBSEL;                          /* MSCAN 1 Transmit Buffer Selection */
volatile CAN1TFLGSTR _CAN1TFLG;                            /* MSCAN 1 Transmitter Flag Register */
volatile CAN1TIERSTR _CAN1TIER;                            /* MSCAN 1 Transmitter Interrupt Enable Register */
volatile CAN1TXDLRSTR _CAN1TXDLR;                          /* MSCAN 1 Transmit Data Length Register */
volatile CAN1TXDSR0STR _CAN1TXDSR0;                        /* MSCAN 1 Transmit Data Segment Register 0 */
volatile CAN1TXDSR1STR _CAN1TXDSR1;                        /* MSCAN 1 Transmit Data Segment Register 1 */
volatile CAN1TXDSR2STR _CAN1TXDSR2;                        /* MSCAN 1 Transmit Data Segment Register 2 */
volatile CAN1TXDSR3STR _CAN1TXDSR3;                        /* MSCAN 1 Transmit Data Segment Register 3 */
volatile CAN1TXDSR4STR _CAN1TXDSR4;                        /* MSCAN 1 Transmit Data Segment Register 4 */
volatile CAN1TXDSR5STR _CAN1TXDSR5;                        /* MSCAN 1 Transmit Data Segment Register 5 */
volatile CAN1TXDSR6STR _CAN1TXDSR6;                        /* MSCAN 1 Transmit Data Segment Register 6 */
volatile CAN1TXDSR7STR _CAN1TXDSR7;                        /* MSCAN 1 Transmit Data Segment Register 7 */
volatile CAN1TXERRSTR _CAN1TXERR;                          /* MSCAN 1 Transmit Error Counter Register */
volatile CAN1TXIDR0STR _CAN1TXIDR0;                        /* MSCAN 1 Transmit Identifier Register 0 */
volatile CAN1TXIDR1STR _CAN1TXIDR1;                        /* MSCAN 1 Transmit Identifier Register 1 */
volatile CAN1TXIDR2STR _CAN1TXIDR2;                        /* MSCAN 1 Transmit Identifier Register 2 */
volatile CAN1TXIDR3STR _CAN1TXIDR3;                        /* MSCAN 1 Transmit Identifier Register 3 */
volatile CAN1TXTBPRSTR _CAN1TXTBPR;                        /* MSCAN 1 Transmit Buffer Priority */
volatile CFORCSTR _CFORC;                                  /* Timer Compare Force Register */
volatile CLKSELSTR _CLKSEL;                                /* CRG Clock Select Register */
volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register */
volatile CRGFLGSTR _CRGFLG;                                /* CRG Flags Register */
volatile CRGINTSTR _CRGINT;                                /* CRG Interrupt Enable Register */
volatile DBGC1STR _DBGC1;                                  /* Debug Control Register 1 */
volatile DBGC2STR _DBGC2;                                  /* Debug Control Register 2 */
volatile DBGC3STR _DBGC3;                                  /* Debug Control Register 3 */