ddr.v

ddr ram controller vhdl code

829                 $display ("At time %t LMR  : Load Mode Register", $time); 
830             end 
831  
832             // Precharge to LMR/EMR 
833             if (($time - RP_chk0 < tRP) || ($time - RP_chk1 < tRP) || 
834                 ($time - RP_chk2 < tRP) || ($time - RP_chk3 < tRP)) begin 
835                 $display ("At time %t ERROR: tRP violation during Load Mode Register", $time); 
836             end 
837  
838             // LMR/EMR to LMR/EMR 
839             if ($time - MRD_chk < tMRD) begin 
840                 $display ("At time %t ERROR: tMRD violation during Load Mode Register", $time); 
841             end 
842  
843             // Auto Refresh to LMR/EMR 
844             if ($time - RFC_chk < tRFC) begin 
845                 $display ("At time %t ERROR: tRFC violation during Load Mode Register", $time); 
846             end 
847  
848             // Precharge to LMR/EMR 
849             if (Pc_b0 === 1'b0 || Pc_b1 === 1'b0 || Pc_b2 === 1'b0 || Pc_b3 === 1'b0) begin 
850                 $display ("At time %t ERROR: all banks must be Precharged before Load Mode Register", $time); 
851             end else begin 
852                 // Register Mode 
853                 Mode_reg = Addr; 
854  
855                 // DLL Reset 
856                 if (DLL_enable === 1'b1 && Addr [8] === 1'b1) begin 
857                     DLL_reset = 1'b1; 
858                     DLL_done = 1'b0; 
859                     DLL_count = 0; 
860                 end else if (DLL_enable === 1'b1 && DLL_reset === 1'b0 && Addr [8] === 1'b0) begin 
861                     $display ("At time %t ERROR: DLL is ENABLE: DLL RESET is required.", $time); 
862                 end else if (DLL_enable === 1'b0 && Addr [8] === 1'b1) begin 
863                     $display ("At time %t ERROR: DLL is DISABLE: DLL RESET will be ignored.", $time); 
864                 end 
865  
866                 // Burst Length 
867                 case (Addr [2 : 0]) 
868                     3'b001  : $display ("At time %t LMR  : Burst Length = 2", $time);  
869                     3'b010  : $display ("At time %t LMR  : Burst Length = 4", $time); 
870                     3'b011  : $display ("At time %t LMR  : Burst Length = 8", $time); 
871                     default : $display ("At time %t ERROR: Burst Length not supported", $time); 
872                 endcase 
873  
874                 // CAS Latency 
875                 case (Addr [6 : 4]) 
876                     3'b010  : $display ("At time %t LMR  : CAS Latency = 2", $time); 
877                     3'b110  : $display ("At time %t LMR  : CAS Latency = 2.5", $time); 
878                     3'b011  : $display ("At time %t LMR  : CAS Latency = 3", $time); 
879                     default : $display ("At time %t ERROR: CAS Latency not supported", $time); 
880                 endcase 
881  
882                 // Record current tMRD time 
883                 MRD_chk = $time; 
884             end 
885         end 
886  
887         // Activate Block 
888         if (Active_enable === 1'b1) begin 
889             if (!(power_up_done)) begin 
890                 $display ("%m: at time %t ERROR: Power Up and Initialization Sequence not completed before executing Activate command", $time); 
891             end 
892             // Display Debug Message 
893             if (Debug) begin 
894                 $display ("At time %t ACT  : Bank = %h, Row = %h", $time, Ba, Addr); 
895             end 
896  
897             // Activate to Activate (different bank) 
898             if ((Prev_bank != Ba) && ($time - RRD_chk < tRRD)) begin 
899                 $display ("At time %t ERROR: tRRD violation during Activate bank %h", $time, Ba); 
900             end 
901              
902             // LMR/EMR to Activate 
903             if ($time - MRD_chk < tMRD) begin 
904                 $display ("At time %t ERROR: tMRD violation during Activate bank %h", $time, Ba); 
905             end 
906  
907             // AutoRefresh to Activate 
908             if ($time - RFC_chk < tRFC) begin 
909                 $display ("At time %t ERROR: tRFC violation during Activate bank %h", $time, Ba); 
910             end 
911  
912             // Precharge to Activate 
913             if ((Ba === 2'b00 && Pc_b0  === 1'b0) || (Ba === 2'b01 && Pc_b1  === 1'b0) || 
914                 (Ba === 2'b10 && Pc_b2  === 1'b0) || (Ba === 2'b11 && Pc_b3  === 1'b0)) begin 
915                 $display ("At time %t ERROR: Bank = %h is already activated - Command Ignored", $time, Ba); 
916                 if (!no_halt) $stop (0); 
917             end else begin 
918                 // Activate Bank 0 
919                 if (Ba === 2'b00 && Pc_b0 === 1'b1) begin 
920                     // Activate to Activate (same bank) 
921                     if ($time - RC_chk0 < tRC) begin 
922                         $display ("At time %t ERROR: tRC violation during Activate bank %h", $time, Ba); 
923                     end 
924  
925                     // Precharge to Activate 
926                     if ($time - RP_chk0 < tRP) begin 
927                         $display ("At time %t ERROR: tRP violation during Activate bank %h", $time, Ba); 
928                     end 
929  
930                     // Record variables for checking violation 
931                     Act_b0 = 1'b1; 
932                     Pc_b0 = 1'b0; 
933                     B0_row_addr = Addr; 
934                     RC_chk0  = $time; 
935                     RCD_chk0 = $time; 
936                     RAS_chk0 = $time; 
937                     RAP_chk0 = $time; 
938                 end 
939  
940                 // Activate Bank 1 
941                 if (Ba === 2'b01 && Pc_b1 === 1'b1) begin 
942                     // Activate to Activate (same bank) 
943                     if ($time - RC_chk1 < tRC) begin 
944                         $display ("At time %t ERROR: tRC violation during Activate bank %h", $time, Ba); 
945                     end 
946  
947                     // Precharge to Activate 
948                     if ($time - RP_chk1 < tRP) begin 
949                         $display ("At time %t ERROR: tRP violation during Activate bank %h", $time, Ba); 
950                     end 
951  
952                     // Record variables for checking violation 
953                     Act_b1 = 1'b1; 
954                     Pc_b1 = 1'b0; 
955                     B1_row_addr = Addr; 
956                     RC_chk1  = $time; 
957                     RCD_chk1 = $time; 
958                     RAS_chk1 = $time; 
959                     RAP_chk1 = $time; 
960                 end 
961  
962                 // Activate Bank 2 
963                 if (Ba === 2'b10 && Pc_b2 === 1'b1) begin 
964                     // Activate to Activate (same bank) 
965                     if ($time - RC_chk2 < tRC) begin 
966                         $display ("At time %t ERROR: tRC violation during Activate bank %h", $time, Ba); 
967                     end 
968  
969                     // Precharge to Activate 
970                     if ($time - RP_chk2 < tRP) begin 
971                         $display ("At time %t ERROR: tRP violation during Activate bank %h", $time, Ba); 
972                     end 
973  
974                     // Record variables for checking violation 
975                     Act_b2 = 1'b1; 
976                     Pc_b2 = 1'b0; 
977                     B2_row_addr = Addr; 
978                     RC_chk2  = $time; 
979                     RCD_chk2 = $time; 
980                     RAS_chk2 = $time; 
981                     RAP_chk2 = $time; 
982                 end 
983  
984                 // Activate Bank 3 
985                 if (Ba === 2'b11 && Pc_b3 === 1'b1) begin 
986                     // Activate to Activate (same bank) 
987                     if ($time - RC_chk3 < tRC) begin 
988                         $display ("At time %t ERROR: tRC violation during Activate bank %h", $time, Ba); 
989                     end 
990  
991                     // Precharge to Activate 
992                     if ($time - RP_chk3 < tRP) begin 
993                         $display ("At time %t ERROR: tRP violation during Activate bank %h", $time, Ba); 
994                     end 
995  
996                     // Record variables for checking violation 
997                     Act_b3 = 1'b1; 
998                     Pc_b3 = 1'b0; 
999                     B3_row_addr = Addr; 
1000                     RC_chk3  = $time; 
1001                     RCD_chk3 = $time; 
1002                     RAS_chk3 = $time; 
1003                     RAP_chk3 = $time; 
1004                 end 
1005                 // Record variable for checking violation 
1006                 RRD_chk = $time; 
1007                 Prev_bank = Ba; 
1008                 read_precharge_truncation[Ba] = 1'b0; 
1009             end 
1010         end 
1011      
1012         // Precharge Block - consider NOP if bank already precharged or in process of precharging 
1013         if (Prech_enable === 1'b1) begin 
1014             // Display Debug Message 
1015             if (Debug) begin 
1016                 $display ("At time %t PRE  : Addr[10] = %b, Bank = %b", $time, Addr[10], Ba); 
1017             end 
1018  
1019             // LMR/EMR to Precharge 
1020             if ($time - MRD_chk < tMRD) begin 
1021                 $display ("At time %t ERROR: tMRD violation during Precharge", $time); 
1022             end 
1023  
1024             // AutoRefresh to Precharge 
1025             if ($time - RFC_chk < tRFC) begin 
1026                 $display ("At time %t ERROR: tRFC violation during Precharge", $time); 
1027             end 
1028  
1029             // Precharge bank 0 
1030             if ((Addr[10] === 1'b1 || (Addr[10] === 1'b0 && Ba === 2'b00)) && Act_b0 === 1'b1) begin 
1031                 Act_b0 = 1'b0; 
1032                 Pc_b0 = 1'b1; 
1033                 RP_chk0 = $time; 
1034                  
1035                 // Activate to Precharge Bank 
1036                 if ($time - RAS_chk0 < tRAS) begin 
1037                     $display ("At time %t ERROR: tRAS violation during Precharge", $time); 
1038                 end 
1039                  
1040                 // tWR violation check for Write 
1041                 if ($time - WR_chk0 < tWR) begin 
1042                     $display ("At time %t ERROR: tWR violation during Precharge", $time); 
1043                 end 
1044             end 
1045  
1046             // Precharge bank 1 
1047             if ((Addr[10] === 1'b1 || (Addr[10] === 1'b0 && Ba === 2'b01)) && Act_b1 === 1'b1) begin 
1048                 Act_b1 = 1'b0; 
1049                 Pc_b1 = 1'b1; 
1050                 RP_chk1 = $time; 
1051  
1052                 // Activate to Precharge Bank 1 
1053                 if ($time - RAS_chk1 < tRAS) begin 
1054                     $display ("At time %t ERROR: tRAS violation during Precharge", $time); 
1055                 end 
1056                  
1057                 // tWR violation check for Write 
1058                 if ($time - WR_chk1 < tWR) begin 
1059                     $display ("At time %t ERROR: tWR violation during Precharge", $time); 
1060                 end 
1061             end 
1062  
1063             // Precharge bank 2 
1064             if ((Addr[10] === 1'b1 || (Addr[10] === 1'b0 && Ba === 2'b10)) && Act_b2 === 1'b1) begin 
1065                 Act_b2 = 1'b0; 
1066                 Pc_b2 = 1'b1; 
1067                 RP_chk2 = $time; 
1068                  
1069                 // Activate to Precharge Bank 2 
1070                 if ($time - RAS_chk2 < tRAS) begin 
1071                     $display ("At time %t ERROR: tRAS violation during Precharge", $time); 
1072                 end 
1073                  
1074                 // tWR violation check for Write 
1075                 if ($time - WR_chk2 < tWR) begin 
1076                     $display ("At time %t ERROR: tWR violation during Precharge", $time); 
1077                 end 
1078             end 
1079  
1080             // Precharge bank 3 
1081             if ((Addr[10] === 1'b1 || (Addr[10] === 1'b0 && Ba === 2'b11)) && Act_b3 === 1'b1) begin 
1082                 Act_b3 = 1'b0; 
1083                 Pc_b3 = 1'b1; 
1084                 RP_chk3 = $time; 
1085                  
1086                 // Activate to Precharge Bank 3 
1087                 if ($time - RAS_chk3 < tRAS) begin 
1088                     $display ("At time %t ERROR: tRAS violation during Precharge", $time); 
1089                 end 
1090                  
1091                 // tWR violation check for Write 
1092                 if ($time - WR_chk3 < tWR) begin 
1093                     $display ("At time %t ERROR: tWR violation during Precharge", $time); 
1094                 end 
1095             end 
1096  
1097             // Prech_count is to make sure we have met part of the initialization sequence 
1098             Prech_count = Prech_count + 1; 
1099  
1100             // Pipeline for READ 
1101             A10_precharge [cas_latency_x2] = Addr[10]; 
1102             Bank_precharge[cas_latency_x2] = Ba; 
1103             Cmnd_precharge[cas_latency_x2] = 1'b1; 
1104         end