makefile

ddr ram controller vhdl code

1 XSTCLEAN=system.bgn system.drc system.mrp system.pcf  
2 XSTCLEAN+=system.bld *.lso *.ncd *.ngd *.ngm *.srp 
3 XSTCLEAN+=system.bit system_signalbrowser.* system-routed_pad.tx 
4 XSTCLEAN+=system.map system_summary.xml timing.twr 
5 XSTCLEAN+=system-routed* system_usage* system.ngc param.opt netlist.lst 
6 XSTCLEAN+=xst 
7  
8  
9  
10 syn: system.bit system-routed.twr 
11  
12 ############################################################################# 
13 # Xilinx Synthesis using XST 
14 system.ngc: 
15         xst -ifn system.xst 
16  
17 system.ngd: system.ngc 
18         ngdbuild -uc system.ucf system.ngc 
19  
20 system.ncd: system.ngd 
21         map system.ngd 
22  
23 system-routed.ncd: system.ncd 
24         par -ol high -w system.ncd system-routed.ncd 
25  
26 system.bit: system-routed.ncd 
27         bitgen -w system-routed.ncd system.bit 
28  
29 system-routed.xdl: system-routed.ncd 
30         xdl -ncd2xdl system-routed.ncd system-routed.xdl 
31  
32 system-routed.twr: system-routed.ncd 
33         trce -v 10 system-routed.ncd system.pcf 
34  
35 timing: system-routed.twr 
36  
37 usage: system-routed.xdl 
38         xdlanalyze.pl system-routed.xdl 1 
39  
40  
41 clean:  
42         rm -Rf $(XSTCLEAN)