start.s

FS2410 开发板上启用 MMU 实现虚拟内存管理

.macro NAND_TO_SDRAM src, dest, blocks
        bl init_nand
	bl wait_nand_ready
        @ read data from nand and write it to SDRAM
        mov r0, #\src
	ldr r1, =\dest
        mov r2, #\blocks
        bl read_nand
.endm

@ --------------------------------------------------------------------
.text
.global _start
_start:
	b reset
	NOP
	NOP
	NOP
	NOP
	NOP
	ldr pc, handle_irq_addr
	NOP
handle_irq_addr:	
	.long handle_irq
reset:
	ldr r0, =0x53000000	 @ Close Watch-dog Timer
	mov r1, #0x0
	str r1, [r0]

	@ init stack 
	ldr sp,=4096
	
	@ disable all interrupts
	mov r1, #0x4A000000
	mov r2, #0xffffffff
	str r2, [r1, #0x08]
	ldr r2, =0x7ff
	str r2, [r1, #0x1c]

	bl  memory_setup	 @ Initialize memory setting
	bl  flash_to_sdram	 @ Copy code to sdram

        ldr pc, =run_on_sdram
run_on_sdram:
	ldr sp, =0x33000000
 	bl init_mmu_tlb		 @ setup page table
 	bl init_mmu		 @ MMU enabled

	msr cpsr_c, #0xd2	 @ set the irq mode stack 
	ldr sp, =0x31000000 
	msr cpsr_c, #0xdf	 @ set the system mode stack 
	ldr sp, =0x32000000 
	bl  init_irq            
	msr cpsr_c, #0x5f	 @ set the system mode open the irq
	
        ldr sp, =0x33000000	 @ Set stack pointer
	bl  main
loop:
	b loop

@ --------------------------------------------------------------------
memory_setup:
	mov  r1, #0x48000000
	adrl r2, mem_cfg_val
	add  r3, r1, #13*4
1:	
	@ write initial values to registers
	ldr  r4, [r2], #4
	str  r4, [r1], #4
	cmp  r1, r3
	bne  1b
	mov  pc, lr
mem_cfg_val:
	.long 0x22111110         @ BWSCON
	.long 0x00000700         @ BANKCON0
	.long 0x00000700         @ BANKCON1
	.long 0x00000700         @ BANKCON2
	.long 0x00000700         @ BANKCON3
	.long 0x00000700         @ BANKCON4
	.long 0x00000700         @ BANKCON5
	.long 0x00018005         @ BANKCON6
	.long 0x00018005         @ BANKCON7 9bit
	.long 0x008e07a3         @ REFRESH
	.long 0x000000b2         @ BANKSIZE 
	.long 0x00000030         @ MRSRB6
	.long 0x00000030         @ MRSRB7

@ --------------------------------------------------------------------
flash_to_sdram:
	stmdb sp!, {r0-r12, lr}

	@ self-copy to SDRAM
	NAND_TO_SDRAM 0 0x30004000 42*2

	@ copy vectors to the high area of SDRAM
	NAND_TO_SDRAM 0 0x33ff0000 1

	ldmia sp!, {r0-r12, pc}

@ --------------------------------------------------------------------
        .equ NFCONF, 0x4e000000 
        .equ NFCMD,  0x4e000004 
        .equ NFADDR, 0x4e000008 
        .equ NFDATA, 0x4e00000c 
        .equ NFSTAT, 0x4e000010 
        .equ NFECC,  0x4e000014
init_nand:
        stmdb sp!, {r0-r3, lr}

	@ enable nand
        mov r0,#NFCONF
        ldr r1,=0xf830 
        str r1,[r0]
        ldr r1,[r0] 
        bic r1, r1, #0x800 
        str r1,[r0]

	@ reset nand
        ldr r2,=NFCMD
        mov r3,#0xff 
        str r3,[r2]

	@ for delay
        mov r3, #0x0a 
1: 
        subs r3, r3, #1 
        bne 1b
	ldmia sp!, {r0-r3, pc}
	
@ --------------------------------------------------------------------	
wait_nand_ready:
	stmdb sp!, {r0-r1, lr}
2:	
	ldr r0, =NFSTAT
	ldr r1, [r0]
	tst r1, #0x01
	beq 2b
	ldmia sp!, {r0-r1, pc}
	
@ --------------------------------------------------------------------
read_nand:
	@ suppose r0 = src, r1 = dest, r2 = blocks
	stmdb sp!, {r3-r5, lr}
	
	@ chip enable
	ldr r3, =NFCONF
	ldr r4, [r3]
	bic r4, r4, #0x800
	str r4, [r3]

	@ for delay
        bl delay		
5:	
	@ set nand read command
	ldr r3, =NFCMD
	mov r4, #0
	str r4, [r3]
	bl delay

	@ locate addr in nand
	ldr r3, =NFADDR
	
	and r4, r0, #0xff
	str r4, [r3]

	mov r5, r0, asr #9
	and r4, r5, #0xff
	str r4, [r3]

	mov r5, r0, asr #17
	and r4, r5, #0xff
	str r4, [r3]

	mov r5, r0, asr #25
	and r4, r5, #0xff
	str r4, [r3]

	@ wait nand state ready
	bl wait_nand_ready

	@ get byte data from NFDATA
	@ and store it to SDRAM addressed by r1
	ldr r3, =NFDATA

	mov r5, #512
4:	
	ldrb r4, [r3]
	strb r4, [r1], #1

	subs r5, r5, #1
	bne 4b
	add r0, r0, #512
	
	subs r2, r2, #1
	bne 5b

	@ chip disable
	ldr r3, =NFCONF
	ldr r4, [r3]
	orr r4, r4, #0x800
	str r4, [r3]
	
	ldmia sp!, {r3-r5, pc}
	
@ --------------------------------------------------------------------
delay:
	stmdb sp!, {r0, lr}
	ldr r0, =50000
wait_me:	
	subs r0, r0, #1
	bne wait_me
	ldmia sp!, {r0, pc}
	
@ --------------------------------------------------------------------
	.equ INTOFFSET, 0x4a000014
	.equ INT_EINT0, 0x33ffff20
handle_irq:
	sub lr, lr, #4           @ set the return pointer
	stmdb sp!, {r0-r12, lr}  @ store the register in stack
	ldr lr, =int_return      @ retrun 
	ldr r0, =INT_EINT0
	ldr r1, =INTOFFSET
	ldr r1, [r1]
	add r0, r0, r1, lsl #2
	ldr pc, [r0]
int_return:
	ldmia sp!, {r0-r12, pc}^