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📄 yuanlitu.map.qmsg

📁 基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）
💻 QMSG
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{ "Info" "ISGN_MEGAFN_DESCENDANT" "add_qf:116\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node add_qf:116\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"add_qf:116\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"add_qf:116\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "add_qf:116\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"add_qf:116\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "add_qf:116\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs add_qf:116\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"add_qf:116\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"add_qf:116\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "add_qf:116\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"add_qf:116\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\"" {  } { { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"fenpinadc0809:130\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 94 2 0 } } { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"fenpinadc0809:130\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/addcore.tdf" 120 6 0 } } { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"fenpinadc0809:130\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "fenpinadc0809:130\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"fenpinadc0809:130\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "fenpinadc0809:130\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"fenpinadc0809:130\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "FENPINADC0809.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINADC0809.vhd" 20 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "fenpinpwm20M_10k:75\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"fenpinpwm20M_10k:75\|lpm_add_sub:Add0\"" {  } { { "FENPINPWM20M_10K.vhd" "" { Text "D:/my_eda4/fpga_program/FENPINPWM20M_10K.vhd" 21 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "fankui1:113\|lpm_add_sub:Add3 " "Info: Elaborated megafunction instantiation \"fankui1:113\|lpm_add_sub:Add3\"" {  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "fankui1:113\|lpm_add_sub:Add3\|addcore:adder fankui1:113\|lpm_add_sub:Add3 " "Info: Elaborated megafunction instantiation \"fankui1:113\|lpm_add_sub:Add3\|addcore:adder\", which is child of megafunction instantiation \"fankui1:113\|lpm_add_sub:Add3\"" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "fankui1:113\|lpm_add_sub:Add3 " "Info: Instantiated megafunction \"fankui1:113\|lpm_add_sub:Add3\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 8 " "Info: Parameter \"LPM_WIDTH\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 836 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "qiankui:114\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiankui:114\|lpm_add_sub:Add0\"" {  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "qiankui:114\|lpm_add_sub:Add0\|addcore:adder qiankui:114\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"qiankui:114\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"qiankui:114\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "qiankui:114\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"qiankui:114\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT NO " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/70/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
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