calculator_design.fit.summary

写给小白们的FPGA入门设计实验

Fitter Status : Successful - Sat Nov 03 08:51:09 2012
Quartus II 64-Bit Version : 9.1 Build 304 01/25/2010 SP 1 SJ Full Version
Revision Name : Calculator_Design
Top-level Entity Name : Calculator_Design
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 191 / 33,216 ( < 1 % )
    Total combinational functions : 191 / 33,216 ( < 1 % )
    Dedicated logic registers : 51 / 33,216 ( < 1 % )
Total registers : 51
Total pins : 44 / 475 ( 9 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )