xc5vgt110_ff1136_2.1

xilinx_v5sx95t_schematics(xilinx v5 95t 开发板原理图)

V 51
K 160291814500 xc5vgt110_ff1136_2
|R 20:37_3-8-06
Y 1
D 0 0 300 230
Z 10
i 44
U 0 -40 10 0 3 0 PKG_TYPE=SK-SMT_BGA-1156
U 0 -50 10 0 3 0 LEVEL=STD
U 0 -60 10 0 3 0 PARTS=1
U 0 -70 10 0 3 0 DEVICE=SK-SMT_BGA-1156
U 30 220 10 0 3 3 REFDES=U?
P 22 300 20 270 20 0 3 0
L 270 20 10 0 8 0 1 0 IO_L9N_D0_FS0_2
A 270 25 10 0 2 0 PINTYPE=BI
A 270 20 10 0 3 0 #=AD19
P 21 300 30 270 30 0 3 0
L 270 30 10 0 8 0 1 0 IO_L9P_D1_FS1_2
A 270 35 10 0 2 0 PINTYPE=BI
A 270 30 10 0 3 0 #=AE19
P 20 300 40 270 40 0 3 0
L 270 40 10 0 8 0 1 0 IO_L8N_D2_FS2_2
A 270 45 10 0 2 0 PINTYPE=BI
A 270 40 10 0 3 0 #=AE17
P 19 300 50 270 50 0 3 0
L 270 50 10 0 8 0 1 0 IO_L8P_D3_2
A 270 55 10 0 2 0 PINTYPE=BI
A 270 50 10 0 3 0 #=AF16
P 18 300 60 270 60 0 3 0
L 270 60 10 0 8 0 1 0 IO_L7N_D4_2
A 270 65 10 0 2 0 PINTYPE=BI
A 270 60 10 0 3 0 #=AD20
P 17 300 70 270 70 0 3 0
L 270 70 10 0 8 0 1 0 IO_L7P_D5_2
A 270 75 10 0 2 0 PINTYPE=BI
A 270 70 10 0 3 0 #=AE21
P 16 300 80 270 80 0 3 0
L 270 80 10 0 8 0 1 0 IO_L6N_D6_2
A 270 85 10 0 2 0 PINTYPE=BI
A 270 80 10 0 3 0 #=AE16
P 15 300 90 270 90 0 3 0
L 270 90 10 0 8 0 1 0 IO_L6P_D7_2
A 270 95 10 0 2 0 PINTYPE=BI
A 270 90 10 0 3 0 #=AF15
P 14 300 100 270 100 0 3 0
L 270 100 10 0 8 0 1 0 IO_L5N_CSO_B_2
A 270 105 10 0 2 0 PINTYPE=BI
A 270 100 10 0 3 0 #=AF21
P 13 300 110 270 110 0 3 0
L 270 110 10 0 8 0 1 0 IO_L5P_FWE_B_2
A 270 115 10 0 2 0 PINTYPE=BI
A 270 110 10 0 3 0 #=AF20
P 12 300 120 270 120 0 3 0
L 270 120 10 0 8 0 1 0 IO_L4N_VREF_FOE_B_MOSI_2
A 270 125 10 0 2 0 PINTYPE=BI
A 270 120 10 0 3 0 #=AF14
P 11 300 130 270 130 0 3 0
L 270 130 10 0 8 0 1 0 IO_L4P_FCS_B_2
A 270 135 10 0 2 0 PINTYPE=BI
A 270 130 10 0 3 0 #=AE14
P 10 300 140 270 140 0 3 0
L 270 140 10 0 8 0 1 0 IO_L3N_A20_2
A 270 145 10 0 2 0 PINTYPE=BI
A 270 140 10 0 3 0 #=AE23
P 9 300 150 270 150 0 3 0
L 270 150 10 0 8 0 1 0 IO_L3P_A21_2
A 270 155 10 0 2 0 PINTYPE=BI
A 270 150 10 0 3 0 #=AE22
P 8 300 160 270 160 0 3 0
L 270 160 10 0 8 0 1 0 IO_L2N_A22_2
A 270 165 10 0 2 0 PINTYPE=BI
A 270 160 10 0 3 0 #=AG12
P 7 300 170 270 170 0 3 0
L 270 170 10 0 8 0 1 0 IO_L2P_A23_2
A 270 175 10 0 2 0 PINTYPE=BI
A 270 170 10 0 3 0 #=AF13
P 6 300 180 270 180 0 3 0
L 270 180 10 0 8 0 1 0 IO_L1N_CC_A24_2
A 270 185 10 0 2 0 PINTYPE=BI
A 270 180 10 0 3 0 #=AG23
P 5 300 190 270 190 0 3 0
L 270 190 10 0 8 0 1 0 IO_L1P_CC_A25_2
A 270 195 10 0 2 0 PINTYPE=BI
A 270 190 10 0 3 0 #=AF23
P 4 300 200 270 200 0 3 0
L 270 200 10 0 8 0 1 0 IO_L0N_CC_RS0_2
A 270 205 10 0 2 0 PINTYPE=BI
A 270 200 10 0 3 0 #=AE12
P 3 300 210 270 210 0 3 0
L 270 210 10 0 8 0 1 0 IO_L0P_CC_RS1_2
A 270 215 10 0 2 0 PINTYPE=BI
A 270 210 10 0 3 0 #=AE13
P 2 0 200 30 200 0 2 0
L 30 200 10 0 2 0 1 0 VCCO2_2
A 30 200 10 0 9 0 #=AH21
A 10 205 10 0 2 0 PINTYPE=IN
P 1 0 210 30 210 0 2 0
A 10 215 10 0 2 0 PINTYPE=IN
A 30 210 10 0 9 3 #=AM19
L 30 210 10 0 2 0 1 0 VCCO1_2
T 140 140 20 0 6 BANK 2
T 140 160 20 0 6 FF1136
U 0 10 10 0 3 0 HETERO=(XC5VGT110_FF1136_0),(XC5VGT110_FF1136_1),(XC5VGT110_FF11
+ 36_11),(XC5VGT110_FF1136_112),(XC5VGT110_FF1136_114),(XC5VGT110_FF1136_116),(X
+ C5VGT110_FF1136_118),(XC5VGT110_FF1136_12),(XC5VGT110_FF1136_120),(XC5VGT110_F
+ F1136_122),(XC5VGT110_FF1136_124),(XC5VGT110_FF1136_126),(XC5VGT110_FF1136_13)
+ ,(XC5VGT110_FF1136_15),(XC5VGT110_FF1136_17),(XC5VGT110_FF1136_18),(XC5VGT110_
+ FF1136_19),(XC5VGT110_FF1136_2),(XC5VGT110_FF1136_20),(XC5VGT110_FF1136_21),(X
+ C5VGT110_FF1136_22),(XC5VGT110_FF1136_23),(XC5VGT110_FF1136_25),(XC5VGT110_FF1
+ 136_3),(XC5VGT110_FF1136_4),(XC5VGT110_FF1136_5),(XC5VGT110_FF1136_6),(XC5VGT1
+ 10_FF1136_AUX),(XC5VGT110_FF1136_GND),(XC5VGT110_FF1136_INT),(XC5VGT110_FF1136
+ _NC)
b 30 10 270 220
U 30 0 10 0 3 3 VALUE=XX
E