hfj11_1g01e.1

xilinx_v5sx95t_schematics(xilinx v5 95t 开发板原理图)

V 51
K 49316356990 hfj11_1g01e
|R 21:49_4-6-06
Y 1
D 0 0 240 240
Z 10
i 42
U 0 -10 10 0 3 3 DEVICE=RJ45_HFJ11-1G01E
U 0 -20 10 0 3 3 PKG_TYPE=RJ45_HFJ11-1G01E
U 0 -30 10 0 3 3 REFDES=P?
U 0 -40 10 0 3 0 PARTS=1
U 0 -50 10 0 3 0 LEVEL=STD
P 3 0 170 30 170 0 2 0
Q 15 0 0
A 30 175 10 0 2 0 PINTYPE=ANALOG
A 30 170 10 0 9 3 #=3
L 30 170 10 0 2 1 1 0 TD1_P
P 2 0 190 30 190 0 2 0
Q 15 0 0
A 30 195 10 0 2 0 PINTYPE=ANALOG
A 30 190 10 0 9 3 #=2
L 30 190 10 0 2 1 1 0 TD0_N
P 6 0 150 30 150 0 2 0
Q 15 0 0
A 30 155 10 0 2 0 PINTYPE=ANALOG
A 30 150 10 0 9 3 #=6
L 30 150 10 0 2 1 1 0 TD1_N
P 4 0 130 30 130 0 2 0
Q 15 0 0
A 30 135 10 0 2 0 PINTYPE=ANALOG
A 30 130 10 0 9 3 #=4
L 30 130 10 0 2 1 1 0 TD2_P
P 5 0 110 30 110 0 2 0
Q 15 0 0
A 30 115 10 0 2 0 PINTYPE=ANALOG
A 30 110 10 0 9 3 #=5
L 30 110 10 0 2 1 1 0 TD2_N
P 8 0 70 30 70 0 2 0
Q 15 0 0
A 30 75 10 0 2 0 PINTYPE=ANALOG
A 30 70 10 0 9 3 #=8
L 30 70 10 0 2 1 1 0 TD3_N
P 7 0 90 30 90 0 2 0
Q 15 0 0
A 30 95 10 0 2 0 PINTYPE=ANALOG
A 30 90 10 0 9 3 #=7
L 30 90 10 0 2 1 1 0 TD3_P
P 9 0 50 30 50 0 2 0
Q 15 0 0
A 30 55 10 0 2 0 PINTYPE=ANALOG
A 30 50 10 0 9 3 #=9
L 30 50 10 0 2 1 1 0 VCC
P 1 0 210 30 210 0 2 0
Q 15 0 0
A 30 215 10 0 2 0 PINTYPE=ANALOG
A 30 210 10 0 9 3 #=1
L 30 210 10 0 2 1 1 0 TD0_P
P 10 0 30 30 30 0 2 0
Q 15 0 0
A 20 35 10 0 2 0 PINTYPE=ANALOG
A 30 30 10 0 9 3 #=10
L 30 30 10 0 2 1 1 0 GND
T 110 10 20 1 3 10/100/1000
T 150 30 20 1 3 MAGNETICS
T 130 40 20 1 3 RJ45 AND
b 30 10 210 230
P 42 240 50 210 50 0 3 0
Q 15 0 0
A 220 55 10 4 2 0 PINTYPE=ANALOG
A 210 50 10 4 9 3 #=SH2
L 210 50 10 4 2 1 1 0 SH2
P 41 240 30 210 30 0 3 0
Q 15 0 0
L 210 30 10 4 2 1 1 0 SH1
A 210 30 10 4 9 3 #=SH1
A 220 35 10 4 2 0 PINTYPE=ANALOG
E