cap_p.1

xilinx_v5sx95t_schematics(xilinx v5 95t 开发板原理图)

V 51
K 194679790200 cap_p
|R 23:34_10-6-05
Y 1
D 0 0 40 35
Z 10
i 4
U 0 -20 10 0 1 0 PARTS=1
U 0 0 10 0 1 0 LEVEL=STD
U 0 -50 10 0 3 0 DEVICE=CAPT_A
U 35 25 10 0 3 3 REFDES=C?
U 35 15 10 0 3 3 VALUE=UF?
P 4 20 35 20 20 0 0 0
L 25 20 10 0 3 1 0 0 1
A 5 25 10 0 3 0 #=1
A -100 25 10 0 3 0 PINTYPE=ANALOG
P 3 20 0 20 15 0 1 0
L 25 0 10 0 3 1 0 0 2
A 5 0 10 0 3 0 #=2
A -100 0 10 0 3 0 PINTYPE=ANALOG
l 2 10 20 30 20
l 2 27 29 23 29
a 30 10 20 15 10 10
l 2 25 27 25 31
U 40 -10 10 0 3 3 DIELECTRIC=XXX
U 40 0 10 0 3 3 VOLTAGE=XXX
E