tps74401.1

xilinx_v5sx95t_schematics(xilinx v5 95t 开发板原理图)

V 51
K 373005424300 tps74401
|R 18:02_3-22-06
Y 1
D 0 0 230 220
Z 10
i 64
U 0 -40 10 0 3 0 PARTS=1
U 0 -20 10 0 3 0 LEVEL=STD
U 0 -70 10 0 3 0 DISTI1=TI
U 0 -70 10 0 3 0 DISTI1_PARTNUMBER=TPS74401RGWT
U 0 -80 10 0 3 0 DISTI1_COST=X.XX
U 90 130 6 0 3 0 PARTNUMBER=TPS74401
U 10 20 10 0 3 3 REFDES=U?
U 70 190 10 0 6 3 DEVICE=TPS74401
U 170 190 10 0 6 3 PKG_TYPE=QFN_5X5
U 100 140 10 0 3 3 MANU=TI
P 64 130 0 130 30 0 1 0
L 130 30 7 7 3 0 1 0 GND_TAB
A 130 25 10 7 9 3 #=21
P 57 50 0 50 30 0 1 0
L 50 30 7 7 3 0 1 0 NC_4
A 50 25 10 7 9 3 #=4
P 24 0 160 30 160 0 2 0
A 25 160 10 0 9 3 #=5
L 30 160 7 0 3 0 1 0 VIN_5
P 29 0 90 30 90 0 2 0
L 30 90 7 0 3 0 1 0 EN
A 25 90 10 0 9 3 #=11
P 34 230 120 200 120 0 3 0
A 205 120 10 4 9 3 #=18
L 200 120 7 4 3 0 1 0 VOUT_18
P 60 150 0 150 30 0 1 0
A 150 25 10 7 9 3 #=12
L 150 30 7 7 3 1 1 0 GND_12
P 56 60 0 60 30 0 1 0
A 60 25 10 7 9 3 #=3
L 60 30 7 7 3 0 1 0 NC_3
P 35 70 0 70 30 0 1 0
L 70 30 7 7 3 0 1 0 NC_2
A 70 25 10 7 9 3 #=2
P 32 80 0 80 30 0 1 0
A 80 25 10 7 9 3 #=13
L 80 30 7 7 3 0 1 0 NC_13
P 61 90 0 90 30 0 1 0
L 90 30 7 7 3 0 1 0 NC_14
A 90 25 10 7 9 3 #=14
P 62 100 0 100 30 0 1 0
L 100 30 7 7 3 0 1 0 NC_17
A 100 25 10 7 9 3 #=17
P 33 0 150 30 150 0 2 0
L 30 150 7 0 3 1 1 0 VIN_6
A 25 150 10 0 9 3 #=6
P 58 0 140 30 140 0 2 0
A 25 140 10 0 9 3 #=7
L 30 140 7 0 3 0 1 0 VIN_7
P 54 0 130 30 130 0 2 0
A 25 130 10 0 9 3 #=8
L 30 130 7 0 3 1 1 0 VIN_8
P 59 0 110 30 110 0 2 0
L 30 110 7 0 3 0 1 0 BIAS
A 25 110 10 0 9 3 #=10
P 55 230 130 200 130 0 3 0
A 205 130 10 4 9 3 #=1
L 200 130 7 4 3 0 1 0 VOUT_1
P 63 230 110 200 110 0 3 0
L 200 110 7 4 3 0 1 0 VOUT_19
A 205 110 10 4 9 3 #=19
P 17 230 100 200 100 0 3 0
L 200 100 7 4 3 0 1 0 VOUT_20
A 205 100 10 4 9 3 #=20
P 31 230 170 200 170 0 3 0
L 200 170 7 4 3 0 1 0 PG
A 205 170 10 4 9 3 #=9
P 30 230 40 200 40 0 3 0
A 205 40 10 4 9 3 #=16
L 200 40 7 4 3 0 1 0 FB
P 44 0 60 30 60 0 2 0
L 30 60 7 0 3 0 1 0 SS
A 25 60 10 0 9 3 #=15
b 30 30 200 190
E