cap_np.1

xilinx_v5sx95t_schematics(xilinx v5 95t 开发板原理图)

V 51
K 339944573700 cap_np
|R 17:04_10-27-05
Y 1
D 0 0 40 30
Z 10
i 4
U 0 -10 10 0 3 0 DEVICE=CAP_NP
U 0 -20 10 0 1 0 PARTS=1
U 0 -30 10 0 1 0 LEVEL=STD
U 41 26 10 2 5 3 REFDES=C?
U 30 10 10 0 3 3 DIELECTRIC=XXX
U 30 0 10 0 3 3 VOLTAGE=XXX
U 30 -10 10 0 3 3 VALUE=XXX
l 2 10 10 30 10
l 2 30 20 10 20
P 3 20 0 20 10 0 1 0
A 40 -5 10 0 3 0 PINTYPE=ANALOG
A 15 0 10 0 3 0 #=2
L 25 -5 10 0 3 1 0 0 CAP1
P 4 20 30 20 20 0 0 0
A 40 20 10 0 3 0 PINTYPE=ANALOG
A 15 20 10 0 3 0 #=1
L 25 20 10 0 3 1 0 0 CAP2
E