📄 main.lst
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C51 COMPILER V8.02 MAIN 05/25/2007 19:23:10 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE MAIN
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: D:\Keil\C51\BIN\C51.EXE main.c ROM(COMPACT) OPTIMIZE(9,SIZE) BROWSE DEBUG OBJECTEXTEND
line level source
1 /* main.c */
2
3 #include <STC12C2052AD.H>
4
5 #include "bltypes.h"
6 #include "uart.h"
7 //#include <stdio.h>
8
9 sbit I2C_SCL = P3^2;
10 sbit I2C_SDA = P3^3;
11 sbit I2C_INT = P3^4;
12
13 #define I2C_ADDR (0x60)
14
15 #define PACKET_START (0xFF)
16 #define MIN_PACKET_SIZE (3)
17 #define MAX_PACKET_SIZE (32)
18
19 #define UART_BUFFER_SIZE (64)
20 #define I2C_BUFFER_SIZE (16)
21
22 ubyte idata s_buf[UART_BUFFER_SIZE];
23 ubyte s_buf_pos = 0;
24 ubyte s_buf_cnt = 0;
25 ubyte s_buf_wr_pos = 0;
26 ubyte s_buf_wr_cnt = 0;
27 ubyte num_packets = 0;
28
29 ubyte idata i2c_buf[I2C_BUFFER_SIZE];
30 ubyte i2c_buf_pos = 0;
31 ubyte i2c_buf_cnt = 0;
32
33 bool i2c_start = false;
34 bool i2c_terminated = true;
35
36 static void ProcessSerialEvent(ubyte c);
37 static void ProcessTimerEvent(ubyte timer_id);
38
39 static void ProcessSerialEvent(ubyte c)
40 {
41 1 if(s_buf_cnt + s_buf_wr_cnt < UART_BUFFER_SIZE)
42 1 {
43 2 //s_buf[(s_buf_pos + s_buf_cnt) % MAX_PACKET_SIZE] = c;
44 2 //s_buf_cnt++;
45 2
46 2 if(s_buf_wr_cnt == 0)
47 2 {
48 3 if(c == PACKET_START)
49 3 {
50 4 s_buf[(s_buf_wr_pos + s_buf_wr_cnt) % UART_BUFFER_SIZE] = c;
51 4 s_buf_wr_cnt++;
52 4 }
53 3 }
54 2 else if(s_buf_wr_cnt == 1)
55 2 {
C51 COMPILER V8.02 MAIN 05/25/2007 19:23:10 PAGE 2
56 3 if(c >= MIN_PACKET_SIZE && c <= MAX_PACKET_SIZE)
57 3 {
58 4 s_buf[(s_buf_wr_pos + s_buf_wr_cnt) % UART_BUFFER_SIZE] = c;
59 4 s_buf_wr_cnt++;
60 4 }
61 3 else
62 3 {
63 4 s_buf_wr_cnt = 0;
64 4 }
65 3 }
66 2 else
67 2 {
68 3 s_buf[(s_buf_wr_pos + s_buf_wr_cnt) % UART_BUFFER_SIZE] = c;
69 3 s_buf_wr_cnt++;
70 3 if(s_buf_wr_cnt > s_buf[(s_buf_wr_pos + 1) % UART_BUFFER_SIZE])
71 3 {
72 4 s_buf_cnt+= s_buf_wr_cnt;
73 4 s_buf_wr_pos = (s_buf_wr_pos + s_buf_wr_cnt) % UART_BUFFER_SIZE;
74 4 s_buf_wr_cnt = 0;
75 4
76 4 num_packets++;
77 4
78 4 I2C_INT = 1;
79 4 }
80 3 }
81 2 }
82 1 else
83 1 {
84 2 s_buf_wr_cnt = 0;
85 2 }
86 1 }
87
88 static void InitI2c(void)
89 {
90 1 //Configure P3 as standard IO port.
91 1 P3M0 = 0;
92 1 P3M1 = 0;
93 1 //Release the I2C bus.
94 1 I2C_SCL = 1;
95 1 I2C_SDA = 1;
96 1 I2C_INT = 0;
97 1 //Initialise the local variant
98 1 num_packets = 0;
99 1 i2c_start = false;
100 1 i2c_terminated = true;
101 1 //Configure external interrupt 1 which connected to SDA
102 1 IT1 = 1; //Trigger type: edge trigger.
103 1 EX1 = 1; //Enable external interrupt 1
104 1 PX1 = 0; //High prior
105 1
106 1 }
107
108 static void I2cInterruptRoutine(void) interrupt 2 using 2
109 {
110 1 if(!I2C_SDA && I2C_SCL)
111 1 {
112 2 i2c_start = true;
113 2 i2c_terminated = false;
114 2
115 2 //Disable interrupt duration the i2c transfer
116 2 EX1 = 0; // Disable External interrupt 1
117 2 EA = 0; // Disable Interrupt
C51 COMPILER V8.02 MAIN 05/25/2007 19:23:10 PAGE 3
118 2 }
119 1 }
120
121 static ubyte i2cReceiveByte(uchar *c)
122 {
123 1 ubyte bits_read = 0;
124 1 uchar cc = 0;
125 1 bool old_scl, old_sda;
126 1 bool byte_ok = false;
127 1 ubyte shift = 0x80;
128 1
129 1 // Disable interrupt duration byte transfer
130 1 EA = 0;
131 1
132 1 old_scl = I2C_SCL;
133 1 old_sda = I2C_SDA;
134 1
135 1 //Release the CLOCK line to start/continue transfer
136 1 I2C_SCL = 1;
137 1
138 1 while(1)
139 1 {
140 2 if(I2C_SCL)
141 2 {
142 3 if(!old_scl)
143 3 {
144 4 old_scl = 1;
145 4 old_sda = I2C_SDA;
146 4 if(shift)
147 4 {
148 5 if(old_sda)
149 5 cc |= shift;
150 5
151 5 shift >>= 1;
152 5
153 5 bits_read++;
154 5 }
155 4 else
156 4 {
157 5 *c = cc;
158 5 }
159 4 }
160 3 else
161 3 {
162 4 if(I2C_SDA != old_sda)
163 4 {
164 5 /*
165 5 A HIGH to LOW transition on the SDA line while SCL is
166 5 HIGH is one such unique case. This situation indicates a
167 5 START condition.
168 5 A LOW to HIGH transition on the SDA line while SCL is
169 5 HIGH defines a STOP condition.
170 5 */
171 5 if(old_sda) //HIGH to LOW: Repeated START condition
172 5 {
173 6 // Repeated START condition detected.
174 6 i2c_start = true;
175 6 }
176 5 i2c_terminated = true;
177 5 break;
178 5 }
179 4 }
C51 COMPILER V8.02 MAIN 05/25/2007 19:23:10 PAGE 4
180 3 }
181 2 else
182 2 {
183 3 if(old_scl)
184 3 {
185 4 if(byte_ok) //If byte transfer can be complete
186 4 {
187 5 //Release SDA, which are sending Acknowledge
188 5 I2C_SDA = 1;
189 5 //Hold the CLOCK line low to interrupts serviced
190 5 I2C_SCL = 0;
191 5 //Byte transfer complete
192 5 break;
193 5 }
194 4
195 4 if(shift)
196 4 {
197 5 //Release SDA
198 5 I2C_SDA = 1;
199 5 }
200 4 else
201 4 {
202 5 // Is first byte - Address byte?
203 5 if(i2c_start)
204 5 {
205 6 if((cc >> 1) == I2C_ADDR) //Match Slave Address?
206 6 {
207 7 // Send Acknowledge
208 7 I2C_SDA = 0;
209 7
210 7 bits_read++;
211 7 }
212 6 else
213 6 {
214 7 i2c_terminated = true;
215 7 }
216 6 // Address byte has received.
217 6 i2c_start = false;
218 6 }
219 5 else
220 5 {
221 6 // Send Acknowledge
222 6 I2C_SDA = 0;
223 6
224 6 bits_read++;
225 6 }
226 5
227 5 // Set byte completed flag, and wait for a Acknowledge cycle.
228 5 byte_ok = true;
229 5 }
230 4 old_scl = 0;
231 4 }
232 3 }
233 2 }
234 1 //Enable interrupt after a byte is complete.
235 1 EA = 1;
236 1
237 1 return bits_read;
238 1 }
239
240 static ubyte i2cSendByte(ubyte c)
241 {
C51 COMPILER V8.02 MAIN 05/25/2007 19:23:10 PAGE 5
242 1 bool old_scl;
243 1 bool byte_ok = false;
244 1 ubyte shift = 0x80;
245 1 ubyte bits_wrote = 0;
246 1
247 1 old_scl = I2C_SCL;
248 1
249 1 //Prepare the first data bit.
250 1 if(c & shift)
251 1 I2C_SDA = 1;
252 1 else
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