📄 hdrv_hardinit.msa
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/*
********************************************************************************
* ACTOS
* driver demo
*
* (c) Copyright 2002-2003, Actions Co,Ld.
* All Right Reserved
*
* File : Hdrv_HardInit.msa
* By :
* Version: 1> v1.00 first version date
********************************************************************************
*/
#include "display.h"
#include "Drv_S6B33B0A.h"
#include "Hdrv_S6B33B0A.h"
module Hdrv_HardInit
public Hdrv_HardInit
public LCD_Init
public LCD_Set
//extern Hdrv_SetCont
extern Write_Command
extern Write_Parameter
extern Delay_10us
extern StoreCE
extern ReStoreCE
extern Write_Display_Ram
extern Store_R0
rseg BBD_IE
////*******************************************************************************/
///* void sUI_HardInit(void);
//** FUNCTION: Hdrv_HardInit
//**
//** Description: 初始化LCM的硬件设备
//**
//** input
//** none
//**
//** output
//** none
//********************************************************************************/
Hdrv_HardInit:
call StoreCE
call LCD_Init
call LCD_Set
call ClearFrametest
call ReStoreCE
ret
//********************************************************************************/
/************************************************************/
/* function:LCD_Init */
/* input output */
/* process: 1,switch LCD mode; 2,reset sensor */
/************************************************************/
ClearFrametest:
push bc
push hl
push de
call Write_Display_Ram
ld bc,0xa000
ld hl,0x8000
ld de,0x0000
ClearFrame_start:
ld a,d
ld (hl),a
ld a,e
ld (hl),a
dec bc
ld a,b
or c
jr nz,ClearFrame_start
//ld c, 0afh
//call Write_Command //display on
pop de
pop hl
pop bc
ret
LCD_Init:
push af
in a,(0eeh)
and 0x1f
out (0eeh),a
in a,(LCMRST_GIO_EN_REG) //set (Oled_RST) to Output Port.
or LCMRST_SET_BIT
out (LCMRST_GIO_EN_REG),a
in a,(LCMA0_GIO_EN_REG) //set (Oled_A0) to Output Port.
or LCMA0_SET_BIT
out (LCMA0_GIO_EN_REG),a
in a,(LCMCE_GIO_EN_REG) //G0 as CE-4
or LCMCE_SET_BIT
out (LCMCE_GIO_EN_REG),a
//disable backlight
in a, (LCMBL_GIO_DATA_REG)
and LCMBL_CLR_BIT
out (LCMBL_GIO_DATA_REG),a
in a,(LCMA0_GIO_DATA_REG) //set (Oled_A0) to 1
or LCMA0_SET_BIT
out (LCMA0_GIO_DATA_REG),a
in a,(LCMRST_GIO_DATA_REG) //set (Oled_RST) to 1
or LCMRST_SET_BIT
out (LCMRST_GIO_DATA_REG),a
ld a,15
call Delay_ams
in a,(LCMRST_GIO_DATA_REG) //set GPIO_d5(Oled_RST) to 0
and LCMRST_CLR_BIT
out (LCMRST_GIO_DATA_REG),a
ld a,2 //gpio_d5 act as RESET for 2ms
call Delay_ams
in a,(LCMRST_GIO_DATA_REG) //set GPIO_d5(Oled_RST) to 1
or LCMRST_SET_BIT
out (LCMRST_GIO_DATA_REG),a
ld a,15
call Delay_ams
pop af
ret
/************************************************************/
/* function:LCD_Set */
/* input: output: */
/* process: 1,stable the power 2,start-up on-chip DC-DC */
/************************************************************/
LCD_Set:
push af
push bc
//Display Control Setting
ld c, 01h
call Write_Command
ld c, 02h
call Write_Parameter
ld c, 02h
call Write_Command
ld c, 92h
call Write_Parameter
ld c, 03h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 04h
call Write_Command
ld c, 10h
call Write_Parameter
ld c, 05h
call Write_Command
ld c, 08h
call Write_Parameter
ld c, 07h
call Write_Command
ld c, 7fh
call Write_Parameter
ld c, 08h
call Write_Command
ld c, 17h
call Write_Parameter
ld c, 09h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 10h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 11h
call Write_Command
ld c, 7fh
call Write_Parameter
ld c, 12h
call Write_Command
ld c, 9fh
call Write_Parameter
ld c, 17h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 18h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 19h
call Write_Command
ld c, 00h
call Write_Parameter
ld c, 06h
call Write_Command
ld c, 0c5h
call Write_Parameter
ld a,10 //Stable
call Delay_ams
pop bc
pop af
ret
/*********************************************/
Delay:
push bc
ld b, 200
delay_loop:
nop
nop
nop
djnz delay_loop
pop bc
ret
Delay_1ms:
push af
push bc
push de
push hl
ld b,04h
contiune_delay213:
push bc
ld b,0ffh
contiune_delay31:
ld hl,4567h
djnz contiune_delay31
pop bc
djnz contiune_delay213
pop hl
pop de
pop bc
pop af
RET
Delay_ams://0~254ms delay
push af
push bc
push de
push hl
ld b,a
jr Delay_ams_while
Delay_ams_continue:
push bc
call Delay_1ms
pop bc
Delay_ams_while:
djnz Delay_ams_continue
pop hl
pop de
pop bc
pop af
RET
end
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