📄 hdrv_hardinit.lst
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# #
# IAR Systems Z80/64180 Assembler V3.03A/WIN 28/Dec/106 14:32:09 #
# #
# Target option = z80 #
# Source file = d:\case_i_d90f\drv\ui_ssd1332\hdrv\hdrv_hardinit.msa#
# List file = d:\case_i_d90f\drv\ui_ssd1332\ui_ssd13\list\hdrv_hardinit.lst#
# Object file = d:\case_i_d90f\drv\ui_ssd1332\ui_ssd13\obj\hdrv_hardinit.r01#
# Command line = -v0 -uu #
# -OD:\case_i_d90f\drv\Ui_SSD1332\UI_SSD13\Obj\ #
# -s+ -M<> -w+ -r -DIC3951 -DNAPDEBUG #
# -LD:\case_i_d90f\drv\Ui_SSD1332\UI_SSD13\List\ #
# -t8 -Id:\sdk_i_90f\inc\ -Id:\case_i_d90f\inc\ #
# -Id:\case_i_d90f\drv\Ui_SSD1332\inc\ #
# D:\CASE_I_D90F\DRV\UI_SSD1332\HDRV\hdrv_hardinit.msa #
# #
# (c) Copyright IAR Systems 1996 #
################################################################################
1 000000 /*
2 000000 ****************************************************
****************************
3 000000 * ACTOS
4 000000 * driver demo
5 000000 *
6 000000 * (c) Copyright 2002-2003, Actions Co
,Ld.
7 000000 * All Right Reserved
8 000000 *
9 000000 * File : Hdrv_HardInit.msa
10 000000 * By :
11 000000 * Version: 1> v1.00 first version date
12 000000 ****************************************************
****************************
13 000000 */
14 000000
15 000000 #include "display.h"
16 000000 #include "Drv_S6B33B0A.h"
17 000000 #include "Hdrv_S6B33B0A.h"
18 000000
19 000000 module Hdrv_HardInit
20 000000
21 000000 public Hdrv_HardInit
22 000000 public LCD_Init
23 000000 public LCD_Set
24 000000
25 000000 //extern Hdrv_SetCont
26 000000 extern Write_Command
27 000000 extern Write_Parameter
28 000000 extern Delay_10us
29 000000 extern StoreCE
30 000000 extern ReStoreCE
31 000000 extern Write_Display_Ram
32 000000 extern Store_R0
33 000000 rseg BBD_IE
34 000000
35 000000 ////************************************************
*******************************/
36 000000 ///* void sUI_HardInit(void);
37 000000 //** FUNCTION: Hdrv_HardInit
38 000000 //**
39 000000 //** Description: 初始化LCM的硬件设备
40 000000 //**
41 000000 //** input
42 000000 //** none
43 000000 //**
44 000000 //** output
45 000000 //** none
46 000000 //**************************************************
******************************/
47 000000 Hdrv_HardInit:
48 000000
49 000000 CD.... call StoreCE
50 000003 CD.... call LCD_Init
51 000006 CD.... call LCD_Set
52 000009 CD.... call ClearFrametest
53 00000C CD.... call ReStoreCE
54 00000F C9 ret
55 000010 //**************************************************
******************************/
56 000010
57 000010
58 000010 /***************************************************
*********/
59 000010 /* function:LCD_Init
*/
60 000010 /* input output
*/
61 000010 /* process: 1,switch LCD mode; 2,reset sensor
*/
62 000010 /***************************************************
*********/
63 000010 ClearFrametest:
64 000010 C5 push bc
65 000011 E5 push hl
66 000012 D5 push de
67 000013 CD.... call Write_Display_Ram
68 000016 0100A0 ld bc,0xa000
69 000019 210080 ld hl,0x8000
70 00001C 110000 ld de,0x0000
71 00001F ClearFrame_start:
72 00001F 7A ld a,d
73 000020 77 ld (hl),a
74 000021 7B ld a,e
75 000022 77 ld (hl),a
76 000023 0B dec bc
77 000024 78 ld a,b
78 000025 B1 or c
79 000026 20F7 jr nz,ClearFrame_start
80 000028
81 000028 //ld c, 0afh
82 000028 //call Write_Command //display on
83 000028 D1 pop de
84 000029 E1 pop hl
85 00002A C1 pop bc
86 00002B C9 ret
87 00002C
88 00002C
89 00002C LCD_Init:
90 00002C F5 push af
91 00002D DBEE in a,(0eeh)
92 00002F E61F and 0x1f
93 000031 D3EE out (0eeh),a
94 000033
95 000033 DBFE in a,(LCMRST_GIO_EN_REG) //set (Oled_
RST) to Output Port.
96 000035 F604 or LCMRST_SET_BIT
97 000037 D3FE out (LCMRST_GIO_EN_REG),a
98 000039
99 000039 DBFE in a,(LCMA0_GIO_EN_REG) //set (Oled_A
0) to Output Port.
100 00003B F602 or LCMA0_SET_BIT
101 00003D D3FE out (LCMA0_GIO_EN_REG),a
102 00003F
103 00003F DBF3 in a,(LCMCE_GIO_EN_REG) //G0
as CE-4
104 000041 F608 or LCMCE_SET_BIT
105 000043 D3F3 out (LCMCE_GIO_EN_REG),a
106 000045
107 000045 //disable backlight
108 000045 DBFA in a, (LCMBL_GIO_DATA_REG)
109 000047 E6F7 and LCMBL_CLR_BIT
110 000049 D3FA out (LCMBL_GIO_DATA_REG),a
111 00004B
112 00004B DBFF in a,(LCMA0_GIO_DATA_REG) //set (Oled
_A0) to 1
113 00004D F602 or LCMA0_SET_BIT
114 00004F D3FF out (LCMA0_GIO_DATA_REG),a
115 000051
116 000051 DBFF in a,(LCMRST_GIO_DATA_REG) //set (Ole
d_RST) to 1
117 000053 F604 or LCMRST_SET_BIT
118 000055 D3FF out (LCMRST_GIO_DATA_REG),a
119 000057
120 000057 3E0F ld a,15
121 000059 CD.... call Delay_ams
122 00005C
123 00005C DBFF in a,(LCMRST_GIO_DATA_REG) //set GPIO
_d5(Oled_RST) to 0
124 00005E E6FB and LCMRST_CLR_BIT
125 000060 D3FF out (LCMRST_GIO_DATA_REG),a
126 000062
127 000062 3E02 ld a,2 //gpio_d5 act as RESET
for 2ms
128 000064 CD.... call Delay_ams
129 000067
130 000067 DBFF in a,(LCMRST_GIO_DATA_REG) //set GPIO
_d5(Oled_RST) to 1
131 000069 F604 or LCMRST_SET_BIT
132 00006B D3FF out (LCMRST_GIO_DATA_REG),a
133 00006D
134 00006D 3E0F ld a,15
135 00006F CD.... call Delay_ams
136 000072
137 000072 F1 pop af
138 000073 C9 ret
139 000074 /***************************************************
*********/
140 000074 /* function:LCD_Set
*/
141 000074 /* input: output:
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