📄 hdrv_hardinit.lst
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################################################################################
# #
# IAR Systems Z80/64180 Assembler V3.03A/WIN 26/Dec/106 14:12:54 #
# #
# Target option = z80 #
# Source file = d:\case_i_d90f\drv\ui_ssd1332\hdrv\hdrv_hardinit.msa#
# List file = d:\case_i_d90f\drv\ui_ssd1332\ui_ssd13_t\list\hdrv_hardinit.lst#
# Object file = d:\case_i_d90f\drv\ui_ssd1332\ui_ssd13_t\obj\hdrv_hardinit.r01#
# Command line = -v0 -uu #
# -OD:\case_i_d90f\drv\Ui_SSD1332\UI_SSD13_T\Obj\ #
# -s+ -M<> -w+ -r -DIC3951 -DNAPDEBUG #
# -LD:\case_i_d90f\drv\Ui_SSD1332\UI_SSD13_T\List\ #
# -t8 -Id:\sdk_i_90f\inc\ -Id:\case_i_d90f\inc\ #
# -Id:\case_i_d90f\drv\Ui_SSD1332\inc\ #
# D:\CASE_I_D90F\DRV\UI_SSD1332\HDRV\hdrv_hardinit.msa #
# #
# (c) Copyright IAR Systems 1996 #
################################################################################
1 000000 /*
2 000000 ****************************************************
****************************
3 000000 * ACTOS
4 000000 * driver demo
5 000000 *
6 000000 * (c) Copyright 2002-2003, Actions Co
,Ld.
7 000000 * All Right Reserved
8 000000 *
9 000000 * File : Hdrv_HardInit.msa
10 000000 * By :
11 000000 * Version: 1> v1.00 first version date
12 000000 ****************************************************
****************************
13 000000 */
14 000000
15 000000 #include "display.h"
16 000000 #include "Drv_S6B33B0A.h"
17 000000 #include "Hdrv_S6B33B0A.h"
18 000000
19 000000 #define RT9369
20 000000
21 000000 //#define REG02_EMHiPageReg 0x02
22 000000
23 000000 //#define LCMRST_GIO_EN_REG 0xf5 //GPIO
_D5 (Output)
24 000000 //#define LCMRST_GIO_DATA_REG 0xf7
25 000000 //#define LCMRST_SET_BIT 0x20
26 000000 //#define LCMRST_CLR_BIT 0xdf
27 000000 //
28 000000 //#define LCMA0_GIO_EN_REG 0xf0 //GPIO
_B4 (Output)
29 000000 //#define LCMA0_GIO_DATA_REG 0xf2
30 000000 //#define LCMA0_SET_BIT 0x10
31 000000 //#define LCMA0_CLR_BIT 0xef
32 000000 //
33 000000 //#define LCMBL_GIO_EN_REG 0xf0 //GPIOB
2(Output)
34 000000 //#define LCMBL_GIO_DATA_REG 0xf2
35 000000 //#define LCMBL_SET_BIT 0x04
36 000000 //#define LCMBl_CLR_BIT 0xfb
37 000000 //
38 000000 //#define A0_GIO_DATA_REG LCMA0_GIO_DATA_REG
39 000000 //#define A0_SET_BIT LCMA0_SET_BIT
40 000000 //#define A0_CLR_BIT LCMA0_CLR_BIT
41 000000 //
42 000000 //#define LCMPOWER_GIO_EN_REG 0xf0 //GPI
O_B2(output)
43 000000 //#define LCMPOWER_GIO_DATA_REG 0xf2
44 000000 //#define LCMPOWER_SET_BIT 0x04
45 000000 //#define LCMPOWER_CLR_BIT 0xfb
46 000000 //
47 000000 //#define LCMCE_GIO_EN_REG 0xf0 //GPIO
_B5 (output) 片选
48 000000 //#define LCMCE_GIO_DATA_REG 0xf2
49 000000 //#define LCMCE_SET_BIT 0x20
50 000000 //#define LCMCE_CLR_BIT 0xef
51 000000
52 000000
53 000000 module Hdrv_HardInit
54 000000
55 000000 public Hdrv_HardInit
56 000000 public LCD_Init
57 000000 public LCD_Set
58 000000
59 000000 //extern Hdrv_SetCont
60 000000 extern Write_Command
61 000000 extern Write_Parameter
62 000000 extern Delay_10us
63 000000 extern StoreCE
64 000000 extern ReStoreCE
65 000000 extern Write_Display_Ram
66 000000 extern Store_R0
67 000000 rseg BBD_IE
68 000000
69 000000 ////************************************************
*******************************/
70 000000 ///* void sUI_HardInit(void);
71 000000 //** FUNCTION: Hdrv_HardInit
72 000000 //**
73 000000 //** Description: 初始化LCM的硬件设备
74 000000 //**
75 000000 //** input
76 000000 //** none
77 000000 //**
78 000000 //** output
79 000000 //** none
80 000000 //**************************************************
******************************/
81 000000 Hdrv_HardInit:
82 000000
83 000000 CD.... call LCD_Init
84 000003 CD.... call StoreCE
85 000006 CD.... call LCD_Set
86 000009 // call ClearFrametest
87 000009 CD.... call ReStoreCE
88 00000C C9 ret
89 00000D //**************************************************
******************************/
90 00000D
91 00000D
92 00000D /***************************************************
*********/
93 00000D /* function:LCD_Init
*/
94 00000D /* input output
*/
95 00000D /* process: 1,switch LCD mode; 2,reset sensor
*/
96 00000D /***************************************************
*********/
97 00000D ClearFrametest:
98 00000D C5 push bc
99 00000E E5 push hl
100 00000F D5 push de
101 000010 CD.... call Write_Display_Ram
102 000013 010080 ld bc,0x8000 //12288 = 96*64*2 pix
el = 96*64 ,每个 pixel 有2个byte数据
103 000016 210080 ld hl,0x8000
104 000019 1E00 ld e,0
105 00001B ClearFrame_start:
106 00001B 7B ld a,e
107 00001C 77 ld (hl),a
108 00001D 0B dec bc
109 00001E 78 ld a,b
110 00001F B1 or c
111 000020 20F9 jr nz,ClearFrame_start
112 000022
113 000022 CD.... call Store_R0
114 000025 0E51 ld c, 51h
115 000027 CD.... call Write_Command //display on
116 00002A D1 pop de
117 00002B E1 pop hl
118 00002C C1 pop bc
119 00002D C9 ret
120 00002E
121 00002E
122 00002E LCD_Init:
123 00002E F5 push af
124 00002F
125 00002F DBFE in a,(LCMRST_GIO_EN_REG) //set (Oled_
RST) to Output Port.
126 000031 F604 or LCMRST_SET_BIT
127 000033 D3FE out (LCMRST_GIO_EN_REG),a
128 000035
129 000035 DBFE in a,(LCMA0_GIO_EN_REG) //set (Oled_A
0) to Output Port.
130 000037 F602 or LCMA0_SET_BIT
131 000039 D3FE out (LCMA0_GIO_EN_REG),a
132 00003B
133 00003B DBF3 in a,(LCMCE_GIO_EN_REG) //G0
as CE-4
134 00003D F608 or LCMCE_SET_BIT
135 00003F D3F3 out (LCMCE_GIO_EN_REG),a
136 000041
137 000041 //disable backlight
138 000041 DBFA in a, (LCMBL_GIO_DATA_REG)
139 000043 E6F7 and LCMBL_CLR_BIT
140 000045 D3FA out (LCMBL_GIO_DATA_REG),a
141 000047
142 000047 DBFF in a,(LCMA0_GIO_DATA_REG) //set (Oled
_A0) to 1
143 000049 F602 or LCMA0_SET_BIT
144 00004B D3FF out (LCMA0_GIO_DATA_REG),a
145 00004D
146 00004D DBFF in a,(LCMRST_GIO_DATA_REG) //set (Ole
d_RST) to 1
147 00004F F604 or LCMRST_SET_BIT
148 000051 D3FF out (LCMRST_GIO_DATA_REG),a
149 000053
150 000053 3E0F ld a,15
151 000055 CD.... call Delay_ams
152 000058
153 000058 DBFF in a,(LCMRST_GIO_DATA_REG) //set GPIO
_d5(Oled_RST) to 0
154 00005A E6FB and LCMRST_CLR_BIT
155 00005C D3FF out (LCMRST_GIO_DATA_REG),a
156 00005E
157 00005E 3E02 ld a,2 //gpio_d5 act as RESET
for 2ms
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