pic_85xx.c

qnx powerpc MPC8245的 BSP源文件

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */





#include "startup.h"
#include <ppc/85xxcpu.h>
#include <ppc/85xxintr.h>
#include "pic_85xx.h"


#define PIC_IN(r)		in32( base+ (PPC85xx_CCSR_OFF_##r))
#define PIC_OUT(r,v)	out32(base+ (PPC85xx_CCSR_OFF_##r),v)

void ppc85xx_config_pic(void) {
	uintptr_t	base;
	unsigned	i;
	unsigned	vector;

	base = startup_io_map(MEG(1), immr_paddr);

	PIC_OUT(GCR,PPC85xx_GCR_RST);
	// Wait for the reset to complete
	do {
	} while(PIC_IN(GCR) & PPC85xx_GCR_RST);

	PIC_OUT(GCR,PPC85xx_GCR_M);
	PIC_OUT(CTPR, 0);

	vector = 0;
	#define VP_DEFAULT (PPC85xx_xIVPR_MSK|(1 << PPC85xx_xIVPR_PRIORITY_SHIFT))
	// Internal interrupts 
	for(i = 0; i < 32; ++i) {
		PIC_OUT(IIVPR(i), (VP_DEFAULT|PPC85xx_xIVPR_P) | vector);
		PIC_OUT(IIDR(i), PPC85xx_xIDR_P0);
		++vector;
	}

	// External interrupts 
	for(i = 0; i < 12; ++i) {
		PIC_OUT(EIVPR(i), (VP_DEFAULT|PPC85xx_xIVPR_S) | vector);
		PIC_OUT(EIDR(i), PPC85xx_xIDR_P0);
		++vector;
	}

	// IPI's 
	for(i = 0; i < 4; ++i) {
		PIC_OUT(IPIVPR(i), VP_DEFAULT | vector);
		++vector;
	}

	// Global Timers
	for(i = 0; i < 4; ++i) {
		PIC_OUT(GTVPR(i), VP_DEFAULT | vector);
		PIC_OUT(GTDR(i), PPC85xx_xIDR_P0);
		++vector;
	}

	// Message
	for(i = 0; i < 4; ++i) {
		PIC_OUT(MIVPR(i), VP_DEFAULT | vector);
		PIC_OUT(MIDR(i), PPC85xx_xIDR_P0);
		++vector;
	}

	if (((PIC_IN(FRR) >> PPC85xx_FRR_NIRQ_SHIFT) & 0x7FF) == 0x4F) {
		/* Extended interrupt handling capablities */
		vector = PPC85xx_INTR_EXTND_BASE;

		/* Additional internal interrupts */
		for(i = 32; i < 48; ++i) {
			PIC_OUT(IIVPR(i), (VP_DEFAULT|PPC85xx_xIVPR_P) | vector);
			PIC_OUT(IIDR(i), PPC85xx_xIDR_P0);
			++vector;
		}

		/* Message shared interrupts */
		for(i = 0; i < 7; ++i) {
			PIC_OUT(MSIVPR(i), VP_DEFAULT | vector);
			PIC_OUT(MSIDR(i), PPC85xx_xIDR_P0);
			++vector;
		}
	}

	startup_io_unmap(base);
}