ppc700_init_l2_cache.c

qnx powerpc MPC8245的 BSP源文件

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */

#include "startup.h"
#include <ppc/603cpu.h>
#include <ppc/700cpu.h>

// Init the L2 cache on PPC700 family chips. 

void ppc700_init_l2_cache(unsigned flags) {
	unsigned 	l2cr, bits;

	if(ppc700_l2cache_giip != 0) {
		l2cr = get_spr(PPC700_SPR_L2CR);
		// Make sure it isn't already enabled
		if(!(l2cr & PPC700_SPR_L2CR_L2E)) {
			flags &= ~PPC700_SPR_L2CR_L2E;
			ppc_sync();
	
			// Setup the proper bits
			set_spr(PPC700_SPR_L2CR, l2cr | flags);
			ppc_isync(); ppc_sync();
	
			// Now we must wait for the pll to be up. Start a global invalidate
			l2cr = get_spr(PPC700_SPR_L2CR);
			set_spr(PPC700_SPR_L2CR, l2cr | PPC700_SPR_L2CR_L2I);
			ppc_isync(); ppc_sync();
	
			// Wait for invalidate to be done
			while((bits = get_spr(PPC700_SPR_L2CR)) & ppc700_l2cache_giip) {
				ppc_isync(); ppc_sync();
			}
	
   			if(bits & PPC700_SPR_L2CR_L2I) {
				// Clear L2I
				set_spr(PPC700_SPR_L2CR, l2cr);
				ppc_isync(); ppc_sync();
			}
	
			//  Enable!
			set_spr(PPC700_SPR_L2CR, l2cr | PPC700_SPR_L2CR_L2E);
			ppc_isync(); ppc_sync();
		}
	}
}