📄 ppc600_set_clock_freqs.c
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/* * $QNXLicenseC: * Copyright 2007, QNX Software Systems. * * Licensed under the Apache License, Version 2.0 (the "License"). You * may not reproduce, modify or distribute this software except in * compliance with the License. You may obtain a copy of the License * at: http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" basis, * WITHOUT WARRANTIES OF ANY KIND, either express or implied. * * This file may contain contributions from others, either as * contributors under the License or as licensors under other terms. * Please review this entire file for other proprietary rights or license * notices, as well as the QNX Development Suite License Guide at * http://licensing.qnx.com/license-guide/ for other information. * $ */#include "startup.h"#include "hidpll.h"#include <ppc/603cpu.h>/* * ppc600_set_clock_freqs.c * Set the cpu_freq, cycles_freq, and timer_freq variables, based on * the main system clock * */voidppc600_set_clock_freqs(unsigned clock) { unsigned pll; if(cycles_freq == 0) cycles_freq = clock / 4; if(timer_freq == 0) timer_freq = clock / 4; if(cpu_freq == 0) { if(hid_pll_bits == NULL) { crash("PLL information unknown\n"); } // Now decode PLL multiplier bits pll = (get_spr(PPC603_SPR_HID1) >> HID_SHIFT(hid_pll_bits)) & HID_MASK(hid_pll_bits); cpu_freq = (clock * HID_GETMULT(hid_pll_bits, pll)) / HID_SCALE(hid_pll_bits); }}
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