📄 ppc8260_init_raminfo.c
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/* * $QNXLicenseC: * Copyright 2007, QNX Software Systems. * * Licensed under the Apache License, Version 2.0 (the "License"). You * may not reproduce, modify or distribute this software except in * compliance with the License. You may obtain a copy of the License * at: http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" basis, * WITHOUT WARRANTIES OF ANY KIND, either express or implied. * * This file may contain contributions from others, either as * contributors under the License or as licensors under other terms. * Please review this entire file for other proprietary rights or license * notices, as well as the QNX Development Suite License Guide at * http://licensing.qnx.com/license-guide/ for other information. * $ *//* * ppc8260_init_raminfo.c * Tell syspage about our RAM configuration */#include "startup.h"void ppc8260_init_raminfo(void) { paddr_t start; unsigned brx, orx, index; uintptr_t pv_immr_base_addr = startup_io_map(0x14000, immr_paddr); /* * BRx : bit 31 : valid bit * bit 24-26: MS : 010 SDRAM-60x bus * bit 0-16 : Base address * ORx : bit 5-11 : SDRAM address mask */ for (index = PPC8260_IMMR_OFF_BR0; index <= PPC8260_IMMR_OFF_BR11; index += (PPC8260_IMMR_OFF_BR1 - PPC8260_IMMR_OFF_BR0)) { brx = in32(pv_immr_base_addr + index); if ((brx & 0xE1) == 0x41) { start = brx & 0xFFFF8000; orx = in32(pv_immr_base_addr + index + (PPC8260_IMMR_OFF_OR0 - PPC8260_IMMR_OFF_BR0)); add_ram(start, MEG((((~orx) & 0xFFF00000) >> 20) + 1)); } } startup_io_unmap(pv_immr_base_addr);}
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