asmoff.c

qnx powerpc MPC8245的 BSP源文件

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */



#include <ppc/cpu.h>
#include <ppc/403spu.h>
#include <ppc/403cpu.h>
#include <ppc/405cpu.h>
#include <ppc/700cpu.h>
#include <ppc/800cpm.h>
#include <ppc/8260cpm.h>
#include <ppc/8260cpu.h>
#include <ppc/440cpu.h>
#include <ppc/85xxcpu.h>
#include <ppc/ibmuic.h>

/*
	This source file isn't included in the startup library.
	It's only used to build the asmoff.def file.

	CPU specific definitions
*/

#include "asmoff.h"

VALUE( PPC_SPR_DEC,			PPC_SPR_DEC );
VALUE( PPCBKE_SPR_DECAR,	PPCBKE_SPR_DECAR );
VALUE( PPCBKE_SPR_TCR,		PPCBKE_SPR_TCR );
VALUE( PPCBKE_SPR_TSR,		PPCBKE_SPR_TSR );
VALUE( PPC_SPR_TBLR,		PPC_SPR_TBL );

VALUE( PPC_MSR_CE,			PPC_MSR_CE );
VALUE( PPC_MSR_EE,			PPC_MSR_EE );
VALUE( PPC_MSR_DE,			PPC_MSR_DE );
VALUE( PPC_MSR_IR,			PPC_MSR_IR );
VALUE( PPC_MSR_DR,			PPC_MSR_DR );

VALUE( PPC403_SPLS,			PPC403_SPLS );
VALUE( PPC403_SPTB,			PPC403_SPTB );
VALUE( PPC403_SPRB,			PPC403_SPRB );

VALUE( PPC403_SPLS_TBR,		PPC403_SPLS_TBR );
VALUE( PPC403_SPLS_RBR,		PPC403_SPLS_RBR );
VALUE( PPC403_SPLS_LB,		PPC403_SPLS_LB );

VALUE( PPC400_DBCR_RST_SYSTEM,	PPC400_DBCR_RST_SYSTEM );
VALUE( PPC405_DBCR0_RST_SYSTEM,	PPC405_DBCR0_RST_SYSTEM );

VALUE( PPC400_TSR_WIS,		PPC400_TSR_WIS );
VALUE( PPC400_TSR_PIS,		PPC400_TSR_PIS );
VALUE( PPC400_TSR_FIS,		PPC400_TSR_FIS );

VALUE( PPC400_TCR_WIE,		PPC400_TCR_WIE );
VALUE( PPC400_TCR_PIE,		PPC400_TCR_PIE );
VALUE( PPC400_TCR_FIE,		PPC400_TCR_FIE );

VALUE( TSR,					PPC400_SPR_TSR );
VALUE( TCR,					PPC400_SPR_TCR );
VALUE( PIT,					PPC400_SPR_PIT );
VALUE( TBLO,				PPC400_SPR_TBLO );
VALUE( DBCR,				PPC400_SPR_DBCR );
VALUE( PPC405_SPR_DBCR0,	PPC405_SPR_DBCR0 );

VALUE( EXISR,				PPC403_DCR_EXISR );
VALUE( EXIER,				PPC403_DCR_EXIER );

VALUE( PPC700_SPR_HID0,		PPC700_SPR_HID0 );

VALUE( PPC800_SPR_IMMR,		PPC800_SPR_IMMR );
VALUE( PPC800_IMMR_DPRAM,	PPC800_IMMR_DPRAM);
VALUE( PPC800_SPR_EIE,		PPC800_SPR_EIE );
VALUE( PPC800_SPR_EID,		PPC800_SPR_EID );

VALUE( PPC800_IMMR_SYPCR,	PPC800_IMMR_SYPCR );
VALUE( PPC800_SYPCR_SWE,	PPC800_SYPCR_SWE );
VALUE( PPC800_SYPCR_SWRI,	PPC800_SYPCR_SWRI );

VALUE( PPC800_IMMR_PITC,	PPC800_IMMR_PITC );
VALUE( PPC800_IMMR_PITR,	PPC800_IMMR_PITR );

VALUE( PPC800_IMMR_PISCR,	PPC800_IMMR_PISCR );
VALUE( PPC800_PISCR_PS,		PPC800_PISCR_PS );

VALUE( PPC800_IMMR_PLPRCR,	PPC800_IMMR_PLPRCR );
VALUE( PPC800_PLPRCR_TMIST,	PPC800_PLPRCR_TMIST );

VALUE( PPC800_IMMR_SIMASK,	PPC800_IMMR_SIMASK );
VALUE( PPC800_IMMR_SIPEND,	PPC800_IMMR_SIPEND );
VALUE( PPC800_IMMR_SIVEC,	PPC800_IMMR_SIVEC );

VALUE( PPC800_INTR_CLASS_CPM,		PPC800_INTR_CLASS_CPM);
VALUE( PPC800_IMMR_CIVR,			PPC800_IMMR_CIVR);
VALUE( PPC800_IMMR_CICR,			PPC800_IMMR_CICR);
VALUE( PPC800_IMMR_CIPR,			PPC800_IMMR_CIPR);
VALUE( PPC800_IMMR_CIMR,			PPC800_IMMR_CIMR);
VALUE( PPC800_IMMR_CISR,			PPC800_IMMR_CISR);

VALUE( PPC400_INTR_WI,		PPC400_INTR_WI );
VALUE( PPC400_INTR_PI,		PPC400_INTR_PI );
VALUE( PPC400_INTR_FI,		PPC400_INTR_FI );
VALUE( PPC_INTR_DECREMENTER,PPC_INTR_DECREMENTER );
VALUE( PPC_INTR_FIT,		PPC_INTR_FIT );
VALUE( PPC_INTR_WATCHDOG,	PPC_INTR_WATCHDOG );

VALUE( PPC8CPM_TXBD_R,	PPC8CPM_TXBD_R);
VALUE( PPC8CPM_TXBD_W,	PPC8CPM_TXBD_W);
VALUE( PPC8CPM_RXBD_BR,	PPC8CPM_RXBD_BR);

VALUE( PPC8CPM_BD_COUNT,	PPC8CPM_BD_COUNT);
VALUE( PPC8CPM_BD_POINTER,		PPC8CPM_BD_POINTER);			

VALUE( PPC8CPM_BD_SIZE,			PPC8CPM_BD_SIZE);

VALUE( PPC8CPM_UART_DBNUM_D,		PPC8CPM_UART_DBNUM_D);

VALUE( PPC8CPM_RXBD_E, 	PPC8CPM_RXBD_E);

VALUE( PPC8CPM_RXBD_W, 	PPC8CPM_RXBD_W);

VALUE( PPC8CPM_CIVR_IACK,		PPC8CPM_CIVR_IACK);

VALUE(SYSPAGE_SMPINFO,offsetof(struct syspage_entry,un.ppc.smpinfo));
VALUE(MPU_START_ADDR,offsetof(struct ppc_smpinfo_entry,mpu_start_addr));

/* ppc 8260 */
VALUE(PPC8260_IMMR_ISB_DEFAULT,		PPC8260_IMMR_ISB_DEFAULT);
VALUE(PPC8260_IMMR_OFF_DPRAM1,		PPC8260_IMMR_OFF_DPRAM1);
VALUE(PPC8260CPM_UART_TXBD_R,		PPC8260CPM_UART_TXBD_R);				
VALUE(PPC8260CPM_BD_POINTER,		PPC8260CPM_BD_POINTER);				
VALUE(PPC8260CPM_BD_COUNT,			PPC8260CPM_BD_COUNT);
VALUE(PPC8260CPM_UART_TXBD_W,		PPC8260CPM_UART_TXBD_W);
VALUE(PPC8260CPM_BD_SIZE,			PPC8260CPM_BD_SIZE);
VALUE(PPC8260CPM_UART_RXBD_W,		PPC8260CPM_UART_RXBD_W);
VALUE(PPC8260CPM_UART_RXBD_BR,		PPC8260CPM_UART_RXBD_BR);
VALUE(PPC8260CPM_UART_RXBD_E,		PPC8260CPM_UART_RXBD_E);
VALUE(PPC8260_IMMR_OFF_SIVEC,		PPC8260_IMMR_OFF_SIVEC);
VALUE(PPC8260_IMMR_OFF_SIPNR_H,		PPC8260_IMMR_OFF_SIPNR_H);
VALUE(PPC8260_IMMR_OFF_SIPNR_L,		PPC8260_IMMR_OFF_SIPNR_L);
VALUE(PPC8260_IMMR_OFF_SIMR_L,		PPC8260_IMMR_OFF_SIMR_L);
VALUE(PPC8260_IMMR_OFF_SIMR_H,		PPC8260_IMMR_OFF_SIMR_H);
VALUE(PPC8260_PISCR_PS,				PPC8260_PISCR_PS);
VALUE(PPC8260_IMMR_OFF_PISCR,		PPC8260_IMMR_OFF_PISCR);
VALUE(PPC8260_IMMR_OFF_PITC,		PPC8260_IMMR_OFF_PITC);
VALUE(PPC8260_IMMR_OFF_PITR,		PPC8260_IMMR_OFF_PITR);

VALUE(PPC405_DCR_UIC0_ER,			PPC405_DCR_UIC0_ER);
VALUE(PPC405_DCR_UIC0_MSR,			PPC405_DCR_UIC0_MSR);
VALUE(PPC405_DCR_UIC0_SR,			PPC405_DCR_UIC0_SR);
VALUE(PPC405_DCR_UIC0_TR,			PPC405_DCR_UIC0_TR);

VALUE(PPCIBM_DCROFF_UIC_ER,			PPCIBM_DCR_UIC_ER(0));
VALUE(PPCIBM_DCROFF_UIC_MSR,		PPCIBM_DCR_UIC_MSR(0));
VALUE(PPCIBM_DCROFF_UIC_SR,			PPCIBM_DCR_UIC_SR(0));
VALUE(PPCIBM_DCROFF_UIC_TR,			PPCIBM_DCR_UIC_TR(0));

VALUE(PPCBKE_TSR_DIS,				PPCBKE_TSR_DIS);
VALUE(PPCBKE_TSR_FIS,				PPCBKE_TSR_FIS);
VALUE(PPCBKE_TSR_WIS,				PPCBKE_TSR_WIS);

VALUE(PPCBKE_TCR_DIE,				PPCBKE_TCR_DIE);
VALUE(PPCBKE_TCR_FIE,				PPCBKE_TCR_FIE);
VALUE(PPCBKE_TCR_WIE,				PPCBKE_TCR_WIE);

VALUE(PPCBKE_SPR_DBCR0,				PPCBKE_SPR_DBCR0);
VALUE(PPCBKE_DBCR0_RST_IMPL3,		PPCBKE_DBCR0_RST_IMPL3);
VALUE(PPCBKE_DBCR0_IDM,				PPCBKE_DBCR0_IDM);

VALUE(PPC440_SPR_MMUCR,		PPC440_SPR_MMUCR);
VALUE(PPC440_MMUCR_STS_SHIFT,PPC440_MMUCR_STS_SHIFT);

VALUE(PPCBKE_TLB_RPN,		offsetof(ppcbke_tlb_t, rpn));
VALUE(PPCBKE_TLB_EPN,		offsetof(ppcbke_tlb_t, epn));
VALUE(PPCBKE_TLB_TID,		offsetof(ppcbke_tlb_t, tid));
VALUE(PPCBKE_TLB_ATTR,		offsetof(ppcbke_tlb_t, attr));
VALUE(PPCBKE_TLB_ACCESS,	offsetof(ppcbke_tlb_t, access));
VALUE(PPCBKE_TLB_SIZE,		offsetof(ppcbke_tlb_t, size));
VALUE(PPCBKE_TLB_TS,		offsetof(ppcbke_tlb_t, ts));
VALUE(PPCBKE_TLB_V,			offsetof(ppcbke_tlb_t, v));

VALUE(PPCBKEM_SPR_MAS0,		PPCBKEM_SPR_MAS0);
VALUE(PPCBKEM_SPR_MAS1,		PPCBKEM_SPR_MAS1);
VALUE(PPCBKEM_SPR_MAS2,		PPCBKEM_SPR_MAS2);
VALUE(PPCBKEM_SPR_MAS3,		PPCBKEM_SPR_MAS3);

VALUE(SYSPAGE_PPC_KERINFO,	offsetof(struct syspage_entry, un.ppc.kerinfo));
VALUE(KERINFO_TS_CLEAR,		offsetof(struct ppc_kerinfo_entry, callout_ts_clear));

VALUE(PPC85xx_CCSR_OFF_PC_IACK,	PPC85xx_CCSR_OFF_PC_IACK);
VALUE(PPC85xx_CCSR_OFF_PC_EOI,	PPC85xx_CCSR_OFF_PC_EOI);
VALUE(PPC85xx_CCSR_OFF_MIVPR0,	PPC85xx_CCSR_OFF_MIVPR(0));
VALUE(PPC85xx_CCSR_OFF_MSIVPR0,	PPC85xx_CCSR_OFF_MSIVPR(0));
VALUE(PPC85xx_CCSR_OFF_GTVPR0,	PPC85xx_CCSR_OFF_GTVPR(0));
VALUE(PPC85xx_CCSR_OFF_EIVPR0,	PPC85xx_CCSR_OFF_EIVPR(0));
VALUE(PPC85xx_CCSR_OFF_IIVPR0,	PPC85xx_CCSR_OFF_IIVPR(0));
VALUE(PPC85xx_CCSR_OFF_IPIVPR0,	PPC85xx_CCSR_OFF_IPIVPR(0));