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📄 ppc405_set_clock_freqs.c

📁 qnx powerpc MPC8245的 BSP源文件
💻 C
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/* * $QNXLicenseC:  * Copyright 2007, QNX Software Systems.   *   * Licensed under the Apache License, Version 2.0 (the "License"). You   * may not reproduce, modify or distribute this software except in   * compliance with the License. You may obtain a copy of the License   * at: http://www.apache.org/licenses/LICENSE-2.0   *   * Unless required by applicable law or agreed to in writing, software   * distributed under the License is distributed on an "AS IS" basis,   * WITHOUT WARRANTIES OF ANY KIND, either express or implied.  *  * This file may contain contributions from others, either as   * contributors under the License or as licensors under other terms.    * Please review this entire file for other proprietary rights or license   * notices, as well as the QNX Development Suite License Guide at   * http://licensing.qnx.com/license-guide/ for other information.  * $  *//* * ppc405_set_clock_freqs.c * Set the cpu_freq, cycles_freq, and timer_freq variables, based on * the main system clock * */#include "startup.h"#include <ppc/405cpu.h>voidppc405_set_clock_freqs(unsigned sys_clk, unsigned timer_clk) {	unsigned	cpu;	unsigned	chpsr;	if(timer_freq == 0) timer_freq = timer_clk;	if(cycles_freq == 0) cycles_freq = timer_clk;	if(cpu_freq == 0) {		chpsr = get_dcr(PPC405_DCR_CPC0_PSR);		cpu = sys_clk;		switch(chpsr & PPC405_CPC0_PSR_PFBD_MASK) {		case PPC405_CPC0_PSR_PFBD_DIV2:	cpu *= 2; break;		case PPC405_CPC0_PSR_PFBD_DIV3:	cpu *= 3; break;		case PPC405_CPC0_PSR_PFBD_DIV4:	cpu *= 4; break;		}		switch(chpsr & PPC405_CPC0_PSR_PDC_MASK) {		case PPC405_CPC0_PSR_PDC_DIV2:	cpu *= 2; break;		case PPC405_CPC0_PSR_PDC_DIV3:	cpu *= 3; break;		case PPC405_CPC0_PSR_PDC_DIV4:	cpu *= 4; break;		}		cpu_freq = cpu;	}}

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