ppc400_vm.s

qnx powerpc MPC8245的 BSP源文件

#  
# Copyright 2007, QNX Software Systems. 
#  
# Licensed under the Apache License, Version 2.0 (the "License"). You 
# may not reproduce, modify or distribute this software except in 
# compliance with the License. You may obtain a copy of the License 
# at: http://www.apache.org/licenses/LICENSE-2.0 
#  
# Unless required by applicable law or agreed to in writing, software 
# distributed under the License is distributed on an "AS IS" basis, 
# WITHOUT WARRANTIES OF ANY KIND, either express or implied.
# 
# This file may contain contributions from others, either as 
# contributors under the License or as licensors under other terms.  
# Please review this entire file for other proprietary rights or license 
# notices, as well as the QNX Development Suite License Guide at 
# http://licensing.qnx.com/license-guide/ for other information.
# 
	.include "ppc/util.ah"

#
# Figure out if this 400 series chip supports virtual memory by trying
# to execute a "tlbia" opcode and seeing if it faults.
#

fault_handler:
	mfsrr0		%r4
	addi		%r4,%r4,4
	mtsrr0		%r4
	li			%r3,0
	rfi
fault_handler_end:
	
.set	PROGRAM_EXC,0x700

routine_start ppc400_virtual_supported, 1

	# install program fault handler
	
	lis		%r12,fault_handler@ha
	la		%r12,fault_handler@l(%r12)
	lswi	%r3,%r12,fault_handler_end - fault_handler
	li		%r12,PROGRAM_EXC
	stswi	%r3,%r12,fault_handler_end - fault_handler
	addi	%r3,%r12,16
	dcbst	0,%r12
	dcbst	0,%r3
	sync
	icbi	0,%r12
	icbi	0,%r3
	isync
	
	li		%r3,1
	
	# If tlbia is supported, it will execute properly and %r3 will remain
	# one. If VM isn't supported, we'll go into the fault handler and
	# %r3 will be changed to a zero value
	
	tlbia
	
	blr
routine_end ppc400_virtual_supported

routine_start ppc400_mftb_supported, 1

	# install program fault handler
	
	lis		%r12,fault_handler@ha
	la		%r12,fault_handler@l(%r12)
	lswi	%r3,%r12,fault_handler_end - fault_handler
	li		%r12,PROGRAM_EXC
	stswi	%r3,%r12,fault_handler_end - fault_handler
	addi	%r3,%r12,16
	dcbst	0,%r12
	dcbst	0,%r3
	sync
	icbi	0,%r12
	icbi	0,%r3
	isync
	
	li		%r3,1
	
   	# If normal PPC timebase registers are supported, the following
	# instruction will execute properly and %r3 will remain
	# one. If it isn't supported, we'll go into the fault handler and
	# %r3 will be changed to a zero value
	
	mftb	%r0
	
	blr
routine_end ppc400_mftb_supported