📄 ppc750fx_set_clock_freqs.c
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/* * $QNXLicenseC: * Copyright 2007, QNX Software Systems. * * Licensed under the Apache License, Version 2.0 (the "License"). You * may not reproduce, modify or distribute this software except in * compliance with the License. You may obtain a copy of the License * at: http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" basis, * WITHOUT WARRANTIES OF ANY KIND, either express or implied. * * This file may contain contributions from others, either as * contributors under the License or as licensors under other terms. * Please review this entire file for other proprietary rights or license * notices, as well as the QNX Development Suite License Guide at * http://licensing.qnx.com/license-guide/ for other information. * $ *//* * ppc750fx_set_clock_freqs.c * Set the cpu_freq, cycles_freq, and timer_freq variables, based on * the main system clock * */#include "startup.h"#include <ppc/603cpu.h>#include <ppc/700cpu.h>/* * The PPC750FX has dual PLL support, and has a HID1 bit field as follows: * 0:4 - external PLL configuration - read only * 5:6 - external PLL range - read only - 0:0 == 600MHz - 733MHz, 1:0 == less than 600 MHz * 7:13 - reserved * 14 - 0: external bits 0:6 control PLL0, 1: internal bits 16:22 control PLL 0 * 15 - 0: PLL0 is source for processor clock, 1: PLL1 is source for processor clock * 16:20 - PLL0 configuration bits * 21:22 - PLL0 range bits * 23 - reserved * 24:28 - PLL1 configuration bits * 29:30 - PLL1 range bits * 31 - reserved */voidppc750fx_set_clock_freqs(unsigned clock) { ppc600_set_clock_freqs(clock);}
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