ppcbug_smp.c

qnx powerpc MPC8245的 BSP源文件

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */

/*
 * SMP startup file for the boards with the PPCBUG ROM monitor.
 */

#include "startup.h"

static volatile int	curr_mpu;
static void (* volatile mpu_start)(void);


static void
wait_mpu() {
	unsigned	cpu = curr_mpu;

	curr_mpu = 0;
	for( ;; ) {
		uintptr_t	ip;
		unsigned	count;

		for(count = 10000; count != 0; --count) {
			// Keep MPU off of bus for a bit
			ppc_sync();
		}

		if((mpu_start != 0) && (curr_mpu == cpu)) {
			ip = (uintptr_t)mpu_start;
			curr_mpu = 0;
			asm( "blr" :: "l" (ip));
		}
	}
}


unsigned
ppcbug_smp_num_cpu(void) {
	unsigned	num_cpus;
	unsigned	msr;
	unsigned	hid0;

	msr = get_msr();
	set_msr(msr & ~(PPC_MSR_DR|PPC_MSR_IR));
	ppc_isync();

	asm volatile( "dcbf 0,%0" :: "b" (&curr_mpu));
	hid0 = get_spr(PPC603_SPR_HID0);
	ppc_sync();
	set_spr(PPC603_SPR_HID0, hid0 | PPC603_SPR_HID0_DLOCK);

	num_cpus = 1;
	for( ;; ) {
		int			res;
	
		curr_mpu = num_cpus;
		ppc_isync();

		// do a PPCBUG FORKMPU request
		__asm__ __volatile__(
			"mr %%r3,%1			;"
			"mr %%r4,%2			;"
			"li %%r10,0x100		;"
			"sc					;"
			"mr %0,%%r3"
			: "=r" (res)
			: "r" (num_cpus), "r" (wait_mpu)
			: "r3", "r4", "r10" );

		// "-3" error code indicates invalid processor number, so
		// we've found all the CPU's.
		if(res == -3) break;
		// On a uniprocessor board, PPCBUG returns -1 for CPU1 start attempt.
		if((res == -1) && (num_cpus == 1)) break;
		if(res != 0) {
			crash("SMP count failed at CPU %d: -%d\n", num_cpus, -res);
		}
		do {
			// Wait for MPU to pick up its number.
		} while(curr_mpu != 0);
		++num_cpus;
		if(num_cpus >= max_cpus) break;
	}

	set_spr(PPC603_SPR_HID0, hid0);
	set_msr(msr);
	ppc_isync();

	return num_cpus;
}

// Perform board specific initialization of the smp_entry section of
// the system page.
void
ppcbug_smp_init(struct smp_entry *smp, unsigned num_cpus) {
}


// Get the 'cpu' processor executing at the 'start' address.
int
ppcbug_smp_start(unsigned cpu, void (*start)(void)) {
	unsigned	hid0;

	mpu_start = start;
	asm volatile( "dcbst 0,%0" :: "b" (&mpu_start));
	ppc_sync();
	curr_mpu = cpu;
	asm volatile( "dcbf 0,%0" :: "b" (&curr_mpu));
	hid0 = get_spr(PPC603_SPR_HID0);
	ppc_sync();
	set_spr(PPC603_SPR_HID0, hid0 | PPC603_SPR_HID0_DLOCK);

	do {
		// Wait for MPU to acknowledge start request
	} while(curr_mpu != 0);

	set_spr(PPC603_SPR_HID0, hid0);
	ppc_sync();

	return 1;
}


// Perform any necessary adjustment of the cpu number
unsigned
ppcbug_smp_adjust_num(unsigned cpu) {
	return cpu;
}