mpc85xx.h

qnx powerpc MPC8245的 BSP源文件

/*
 * $QNXLicenseC: 
 * Copyright 2007, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */




#ifndef _MPC85XX_H_INCLUDED
#define _MPC85XX_H_INCLUDED

#ifndef __PLATFORM_H_INCLUDED
#include <sys/platform.h>
#endif

#ifndef _INTTYPES_H_INCLUDED
 #include <inttypes.h>
#endif

#ifndef __TYPES_H_INCLUDED
 #include <sys/types.h>
#endif

#include <hw/pci.h>
#include <hw/pci_devices.h>
#include <pcidrvr.h>

#include <sys/syspage.h>
#include <hw/sysinfo.h>

#ifndef BIT
#define BIT(x)	(1<<(x))
#endif

#define MPC85XX_PCI_MEM_BASE           0x80000000
#define MPC85XX_PCI_MEM_SIZE			   0x0000001a
#define MPC85XX_PCI_MEM_LEN             0x08000000
#define MPC85XX_PCI_IO_BASE               0x88000000
#define MPC85XX_PCI_IO_SIZE			       0x0000001a
#define MPC85XX_PCI_IO_LEN                 0X08000000

/*
 * PCI Register Base
 
 */
#define MPC85XX_PCI_REGISTER_OFFSET		0x00008000
#define MPC85XX_PCI_REGISTER_LEN		0x0E24
#define MPC85XX_LAW_REGISTER_OFFSET		0x00000c08
#define MPC85XX_LAW_REGISTER_LEN		0xE8
/*
 * PCI/X Memory Mapped Regisers
 */
#define MPC85XX_PCI_CFG_ADDR				0x00
#define MPC85XX_PCI_CFG_DATA				0x04
#define MPC85XX_PCI_POTAR0					0xC00
#define MPC85XX_PCI_POTAR1					0xC20
#define MPC85XX_PCI_POTAR2					0xC40
#define MPC85XX_PCI_POTAR3					0xC60
#define MPC85XX_PCI_POTAR4					0xC80
#define MPC85XX_PCI_POTEAR0				0xC04
#define MPC85XX_PCI_POTEAR1				0xC24
#define MPC85XX_PCI_POTEAR2				0xC44
#define MPC85XX_PCI_POTEAR3				0xC64
#define MPC85XX_PCI_POTEAR4				0xC84
#define MPC85XX_PCI_POWBAR0				0xC08
#define MPC85XX_PCI_POWBAR1				0xC28
#define MPC85XX_PCI_POWBAR2				0xC48
#define MPC85XX_PCI_POWBAR3				0xC68
#define MPC85XX_PCI_POWBAR4				0xC88
#define MPC85XX_PCI_POWAR0				    0xC10
#define MPC85XX_PCI_POWAR1				    0xC30
#define MPC85XX_PCI_POWAR2				    0xC50
#define MPC85XX_PCI_POWAR3				    0xC70
#define MPC85XX_PCI_POWAR4				    0xC90
#define MPC85XX_PCI_PITAR3				    0xDA0
#define MPC85XX_PCI_PITAR2				    0xDC0
#define MPC85XX_PCI_PITAR1				    0xDE0
#define MPC85XX_PCI_PIWBAR3				0xDA8
#define MPC85XX_PCI_PIWBAR2				0xDC8
#define MPC85XX_PCI_PIWBAR1				0xDE8
#define MPC85XX_PCI_PIWBEAR3				0xDAC
#define MPC85XX_PCI_PIWBEAR2				0xDCC
#define MPC85XX_PCI_PIWAR3				    0xDB0
#define MPC85XX_PCI_PIWAR2				    0xDD0
#define MPC85XX_PCI_PIWAR1				    0xDF0

#define MPC85XX_PCI_ENABLE_CONFIG        BIT(31)

#define MAX_SLOTS	4

typedef struct _mpc85xx_dev {
	uint32_t		ccsr_base;
	uint32_t		mem_start;
	uint32_t		mem_size;
	uint32_t		pci_membase;
	uint32_t		pci_iobase;
	char				*register_base;
	char				*law_register_base;
	unsigned      flags;
	uint64_t		pci_register_base;
	uint64_t		pci_isa;
	uint64_t		pci_io;
	uint64_t		pci_mem;
	uint32_t		devbase;
	uint32_t		irqbase;
	uint8_t			revision;
	uint8_t			irqrotate;
	uint8_t			rsvd[2];
} mpc85xx_dev_t;

int		mpc85xx_attach( char *options, void **hdl );
int		mpc85xx_detach( void *hdl );
int		mpc85xx_cnfg_bridge( void *hdl, uint32_t bus, uint32_t devfunc, pci_bus_t *pbus );
int		mpc85xx_read_cnfg( void *hdl, uint32_t bus, uint32_t devfunc, uint32_t reg, uint32_t width, void *buf );
int		mpc85xx_write_cnfg( void *hdl, uint32_t bus, uint32_t devfunc, uint32_t reg, uint32_t width, const uint32_t data );
int		mpc85xx_special_cycle( void *hdl, uint32_t bus, uint32_t data );
int 	mpc85xx_map_irq( void *hdl, uint32_t bus, uint32_t devfunc, uint32_t line, uint32_t pin, uint32_t flags );
int 	mpc85xx_avail_irq_ads( void *hdl, uint32_t bus, uint32_t devfunc, uint32_t *list, uint32_t *nelm );
int 	mpc85xx_avail_irq_gen( void *hdl, uint32_t bus, uint32_t devfunc, uint32_t *list, uint32_t *nelm );
int 	mpc85xx_map_addr( void *hdl, uint64_t iaddr, uint64_t *oaddr, uint32_t type );

#endif