📄 power_48pulsegtoconverter.mdl
字号:
Line { LineType "Connection" SrcBlock "Zigzag\nPhase Shifting Transformer\n(-7.5 deg)" SrcPort LConn6 Points [-30, 0; 0, 105] DstBlock "Zigzag\nPhase Shifting Transformer\n(-7.5 -30 deg)" DstPort LConn3 } Annotation { Name "48-pulse Voltage-Sourced Converter\n(switches)" Position [115, 32] FontSize 12 FontWeight "bold" } } } Block { BlockType Reference Name "9650 V " Description "source block" Ports [0, 0, 0, 0, 0, 1, 1] Position [50, 195, 70, 230] Orientation "up" AttributesFormatString "\\n" DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Electrical\nSources/DC Voltage Source" SourceType "DC Voltage Source" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Amplitude "9650" Measurements "None" } Block { BlockType Reference Name "9650 V " Description "source block" Ports [0, 0, 0, 0, 0, 1, 1] Position [50, 110, 70, 145] Orientation "up" AttributesFormatString "\\n" DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Electrical\nSources/DC Voltage Source" SourceType "DC Voltage Source" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Amplitude "9650" Measurements "None" } Block { BlockType Reference Name "Discrete\nVirtual PLL" Ports [0, 3] Position [415, 330, 475, 400] Orientation "left" BackgroundColor "lightBlue" NamePlacement "alternate" DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discrete\nVirtual PLL" SourceType "Discrete Virtual PLL" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Freq "60" Phase "0" Ts "5e-6" } Block { BlockType SubSystem Name "Double click here for more info" Ports [] Position [549, 469, 579, 495] DropShadow on OpenFcn "showdemo(bdroot(gcb))" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskDisplay "disp('?')" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" System { Name "Double click here for more info" Location [15, 90, 1033, 736] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Annotation { Name "Run the simulation and observe the following waveforms on the Scope block:\n\nVoltages generated by the inverter (trace 1), load currents (trace 2), phase-neutral voltage and phase-phase voltage of one of the four inverters (1Y) superimposed on trace 3.\nWhen the inverter is operating at no load, you can observe the three 48-step voltage waveform. When the load is switched on the voltage becomes smoother because harmonics\nare filtered by the transformer leakage reactances.\n\nOnce the simulation is completed, open the Powergui and select \"FFT Analysis\" to display the 0-4000 Hz frequency spectrum of signals saved \nin the two \"psb48pulse_str\" structure. Select signal labeled 'Vabc (pu)'. The FFT will be performed on a 1-cycle window of phase A voltage starting at t = 0.025-1/60 s\n(inverter operating at no load). Click on Display and observe the frequency spectrum.\n\nThe fundamental component of Voltage (in pu) as well as THD are displayed above the spectrum window.\nNotice that the first significant harmonics are 47th and 49th (approx. 2%). Notice also that 23rd and 25th are reduced below 0.3%. \nIn order to appreciate the efficiency of harmonic neutralization, you can also observe the frequency spectrum of phase-phase voltage generated by each individual inverter. \nSelect input labeled \"Van Vab Converter 1Y\" and signal number 2 and click on Display. Observe that THD in the 0 - 4000 Hz frequency range is 25%.\n\nYou can also run another simulation by specifying different values of sigma at the input of the pulse generator. \nYou can verify that, in order to cancel a particular harmonic n in the phase-phase voltage of each individual converter, the Sigma value (in degrees) is given by:\n\n Sigma=180*(1 - 1/n)\n\nVerify also that choosing Sigma = 180 degrees is equivalent to using 2-level converters and that voltage waveform is degraded to 24 pulses." Position [21, 630] HorizontalAlignment "left" VerticalAlignment "top" FontSize 12 } Annotation { Name "In this example, ideal switches and zig-zag phase shifting transformers are used to build a GTO-type 100 MVA, 138 kV voltage source inverter.\nThis type of converter is used in high-power (up to 200 MVA) Flexible AC Transmission Systems (FACTS) which are used to control power flow on transmission grids.\nIt can be used, for example, to build a model of shunt or series static compensator (STATCOM or SSSC) or, using two such converters, a combination of shunt and series\ndevices known as Unified Power Flow Controller (UPFC).\n\nThe inverter described in this example is a harmonic neutralized, 48-pulse GTO converter described in reference. It consists of four 3-phase, 3-level inverters and \nfour phase-shifting transformers. Open the \"48-pulse inverter\" subsystem. Notice that the DC bus (Vdc = +/-9650 V) is connected to the four 3-phase inverters.The four voltages \ngenerated by the inverters are applied to secondary windings of four zig-zag phase-shifting transformers connected in Wye (Y) or Delta (D). The four transformer primary windings are \nconnected in series and the converter pulse patterns are phase shifted so that the four voltage fundamental components sum in phase on the primary side.\n\nEach 3-level inverter generates three square-wave voltages which can be +Vdc, 0, -Vdc. The duration of the +Vdc or -Vdc level (Sigma) can be adjusted between 0 and 180\ndegrees from the Sigma input of the Firing Pulse Generator block.\nEach inverter uses a Three-Level Bridge block where specified power electronic devices are Ideal Switches. In this model each leg of the inverter uses 3 ideal switches\nto obtain the 3 voltage levels (+Vdc, 0, - Vdc). This simple model simulates the behavior of a physical inverter where each leg consists of 4 GTOs, 4 antiparallel diodes and \n2 neutral clamping diodes. Despite this simplified switch arrangement, the model still requires 4 pulses per arm as in the physical model. \nThe pulse pattern sent to each leg of a 3-phase inverter is described inside the Firing Pulse Generator.\n\nYou can also select GTO/Diodes pairs instead of Ideal Switches as power electronic devices. It would allow you to specify forward voltage drops for GTOs and diodes\nand to observe currents flowing in GTOs and diodes by means of the Multimeter block.\n\nThe phase shifts produced by the secondary delta connections (-30 degrees) and by the primary zig-zag connections (+7.5 degrees for transformers 1Y and 1D, and -7.5 degrees\nfor transformers 2Y and 2D) allows to neutralize harmonics up to 45th harmonic, as explained below:\n\nThe 30-degree phase-shift between the Y and D secondaries cancels harmonics 5+12n (5, 17, 29, 41, ...) and 7+12n (7, 19, 31, 43, ...). In addition, the 15-degree phase shift between\nthe two groups of transformers (1Y and 1D leading by 7.5 degrees, 2Y and 2D lagging by +7.5 degrees) allows cancellation of harmonics 11+24n (11, 35, ...) and 13+24n (13, 37, ...).\nConsidering that all 3n the harmonics are not transmitted by the Y and D secondaries, the first harmonic which are not cancelled by the transformers are 23rd, 25th, 47th and 49th.\nBy choosing an appropriate conduction angle for the 3-level inverters (sigma = 180 - 7.5 = 172.5 degrees), the 23rd and 25th can be minimized. The first significant harmonics are\ntherefore the 47th and 49th. This type of inverter generates an almost sinusoidal waveform consisting of 48-steps.\n\nThe inverter is operated in open loop at constant DC voltage. During the first three cycles the inverter operates at no load. Then, at t = 0.05 s, a 100 MVA resistive load \nis connected at the 138-kV terminals." Position [21, 135] HorizontalAlignment "left" VerticalAlignment "top" FontSize 12 } Annotation { Name "This demonstration illustrates use of 3-level converters and zig-zag phase-shifting\ntransformers in a 48-pulse square-wave GTO converter. It also demonstrates harmonic\nanalysis using the Powergui/FFT tool. " Position [24, 17] HorizontalAlignment "left" VerticalAlignment "top" FontSize 14 FontWeight "bold" } Annotation { Name "Circuit Description" Position [19, 107] HorizontalAlignment "left" VerticalAlignment "top" ForegroundColor "blue" FontSize 14 FontWeight "bold" } Annotation { Name "Demonstration" Position [19, 607] HorizontalAlignment "left" VerticalAlignment "top" ForegroundColor "blue" FontSize 14 FontWeight "bold" } Annotation { Name "P. Giroux and G. Sybille (Hydro-Quebec)" Position [22, 77] HorizontalAlignment "left" VerticalAlignment "top" FontName "Arial" FontSize 12 } Annotation { Name "Reference: " Position [24, 952] HorizontalAlignment "left" VerticalAlignment "top" FontSize 12 FontWeight "bold" } Annotation { Name "Narain G. Hingorani and Laszlo Gyuyi, \"Understanding FACTS\", IEEE Press , 2000" Position [96, 955] HorizontalAlignment "left" VerticalAlignment "top" FontSize 12 } } } Block { BlockType SubSystem Name "Firing Pulses\nGenerator" Ports [3, 1] Position [180, 290, 270, 410] Orientation "left" ForegroundColor "blue" BackgroundColor "lightBlue" DropShadow on NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off System { Name "Firing Pulses\nGenerator" Location [-73, 188, 918, 858] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Alpha" Position [340, 78, 370, 92] IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Sigma" Position [345, 123, 375, 137] Port "2" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "wt" Position [35, 53, 65, 67] Port "3" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType SubSystem Name "Bridge 1D" Ports [3, 1] Position [570, 172, 660, 308] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off System { Name "Bridge 1D" Location [110, 88, 720, 635] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "wt" Position [30, 43, 60, 57] NamePlacement "alternate" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Alpha" Position [30, 73, 60, 87] Port "2" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Sigma" Position [190, 103, 220, 117] Port "3" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant" Position [75, 232, 115, 258] ShowName off Value "-2*pi/3" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" Position [90, 417, 130, 443] ShowName off Value "2*pi/3" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Mux Name "Mux1" Ports [3, 1] Position [465, 74, 470, 176] ShowName off Inputs "[4 4 4]" DisplayOption "bar" } Block { BlockType SubSystem Name "Phase A" Ports [2, 1] Position [315, 40, 390, 135] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off System { Name "Phase A" Location [36, 74, 1044, 712] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "wt" Position [125, 173, 155, 187] IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" Port { PortNumber 1 Name "wt" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Inport Name "sigma" Position [80, 68, 110, 82] Port "2" IconDisplay "Port number" PortDimensions "1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" Position [285, 223, 325, 247] ShowName off Value "[0 -pi]" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant2" Position [470, 89, 500, 111] ShowName off Value "2*pi" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant3" Position [145, 346, 165, 364] ShowName off Value "0" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant8" Position [65, 451, 85, 469] ShowName off Value "pi" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant9" Position [80, 34, 110, 56] ShowName off Value "pi" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Gain Name "Deg->Rad2" Position [200, 46, 240, 74] ShowName off Gain "0.5" ParameterDataType "sfix(16)" ParameterScaling "2^0" OutDataType "sfix(16)" OutScaling "2^0" Port { PortNumber 1 Name "Beta" RTW
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -