📄 example 3-48.asm
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[B_hafn2] LDDW.D2 *B_x++, B_x2mp1:B_x2m ; (p) load x[2m+1]:x[2m]
||[!B_lx2mc]LDDW.D1 *A4, A_si:A_co ; (p) load si:co
||[!B_lx2mc]MPY .M2 1, B_hafn2, B_lx2mc ; (p) reset load cntr
||[B_lx2iac]SUB .S2 B_lx2iac, 1, B_lx2iac ; (p) decr load cntr
|| ADDSP .L1 A_x2ia, A_rtemp, A_x2ias ; (e) x[2ia]=x[2ia]+rtemp
|| SUBSP .L2X A_x2iap1, B_itemp, B_x2mp1s ; (e) x[2m+1]=x[2ia+1]-itemp
|| ADD .S1 A4, 8, A_w ; (p) set w ptr
||[!A_stcnt]MPY.M1X 1, B_n2, A_stcnt ; (p) reset store cntr
MPYSP .M1X A_co, B_x2m, A_p1 ; (e) p1=co*x[2m]
|| MPYSP .M2X A_co, B_x2mp1, B_p2 ; (e) p2=co*x[2m+1]
||[!B_lx2iac]ADD.S1 A_x, A_8n2, A_x ; (e) incr load ptr if required
|| MV .S2 B5, B12 ; preserve store ptr
|| STW .D1T1 A_x2ias, *A11++ ; (e) store x[2ia]
|| STW .D2T2 B_x2mp1s, *B5[1] ; (e) store x[2m+1]
[B_lx2mc]SUB.S2 B_lx2mc, 1, B_lx2mc ; decr load cntr
||[!B_lx2iac]MPY.M2 1, B_n2, B_lx2iac ; reset load cntr
|| SUBSP .L1 A_x2ia, A_rtemp, A_x2ms ; (e) x[2m]=x[2ia]-rtemp
|| ADDSP .L2X A_x2iap1, B_itemp, B_x2iap1s ; (e) x[2ia+1]=x[2ia+1]+itemp
|| STW .D1 B_x2iap1s, *A11++ ; (e) store x[2ia+1]
|| STW .D2 A_x2ms, *B12++[2] ; (e) store x[2m]
||[A_stcnt] SUB.S1 A_stcnt, 1, A_stcnt ; (e) decr store cntr
|| MPY .M1X B13, 1, A_nby2 ; is it last outer loop?
LDDW .D1 *A_x++, A_x2iap1:A_x2ia ; (e) load x[2ia+1]:x[2ia]
|| MPYSP .M1X A_si, B_x2mp1, A_p3 ; (e) p3=si*x[2m+1]
|| MPYSP .M2X A_si, B_x2m, B_p4 ; (e) p4=si*x[2m]
||[!B_lx2mc]ADDAW.D2 B_x, B_n2, B_x ; (p) incr ptr if required
|| ADDSP .L1 A_p1, A_p3, A_rtemp ; (e) rtemp=p1+p3
|| SUBSP .L2 B_p2, B_p4, B_itemp ; (e) itemp=p2-p4
||[!A_stcnt]ADD.S2 B12, B_8n2, B12 ; (e) incr store ptr if required
||[!A_stcnt]ADD.S1 A11, A_8n2, A11 ; (e) incr store ptr if required
[B_hafn2] LDDW.D2 *B_x++, B_x2mp1:B_x2m ; (p) load x[2m+1]:x[2m]
||[!B_lx2mc]LDDW.D1 *A_w++, A_si:A_co ; (p) load si:co
||[!B_lx2mc]MPY .M2 1, B_hafn2, B_lx2mc ; (p) reset load cntr
||[B_lx2iac]SUB .S2 B_lx2iac, 1, B_lx2iac ; (p) decr load cntr
|| ADDSP .L1 A_x2ia, A_rtemp, A_x2ias ; (e) x[2ia]=x[2ia]+rtemp
|| SUBSP .L2X A_x2iap1, B_itemp, B_x2mp1s ; (e) x[2m+1]=x[2ia+1]-itemp
||[!A_stcnt]MPY.M1X 1, B_n2, A_stcnt ; (e) reset store cntr
||[A_nby2]SUB .S1 A_nby2, 1, A_nby2 ; is it last outer loop?
MPYSP .M1X A_co, B_x2m, A_p1 ; (p) p1=co*x[2m]
|| MPYSP .M2X A_co, B_x2mp1, B_p2 ; (p) p2=co*x[2m+1]
||[!B_lx2iac]ADD.S1 A_x, A_8n2, A_x ; (e) incr load ptr if required
|| MV .S2 B_8n2, B9 ; preserve store ptr
|| STW .D1T1 A_x2ias, *A11++ ; (e) store x[2ia]
|| STW .D2T2 B_x2mp1s, *B12[1] ; (e) store x[2m+1]
[B_lx2mc]SUB.S2 B_lx2mc, 1, B_lx2mc ; decr load cntr
||[!B_lx2iac]MPY.M2 1, B_n2, B_lx2iac ; reset load cntr
|| SUBSP .L1 A_x2ia, A_rtemp, A_x2ms ; (e) x[2m]=x[2ia]-rtemp
|| ADDSP .L2X A_x2iap1, B_itemp, B_x2iap1s ; (e) x[2ia+1]=x[2ia+1]+itemp
|| STW .D1 B_x2iap1s, *A11++ ; (e) store x[2ia+1]
|| STW .D2 A_x2ms, *B12++[2] ; (e) store x[2m]
||[A_stcnt] SUB.S1 A_stcnt, 1, A_stcnt ; decr store cntr
LDDW .D1 *A_x++, A_x2iap1:A_x2ia ; (e) load x[2ia+1]:x[2ia]
|| MPYSP .M1X A_si, B_x2mp1, A_p3 ; (e) p3=si*x[2m+1]
|| MPYSP .M2X A_si, B_x2m, B_p4 ; (e) p4=si*x[2m]
||[!B_lx2mc]ADDAW.D2 B_x, B_n2, B_x ; (p) incr ptr if required
|| ADDSP .L1 A_p1, A_p3, A_rtemp ; (e) rtemp=p1+p3
|| SUBSP .L2 B_p2, B_p4, B_itemp ; (e) itemp=p2-p4
||[!A_stcnt]ADD.S2 B12, B9, B12 ; (e) incr store ptr if required
||[!A_stcnt]ADD.S1 A11, A_8n2, A11 ; (e) incr store ptr if required
[B_hafn2] LDDW.D2 *B_x++, B_x2mp1:B_x2m ; (p) load x[2m+1]:x[2m]
||[!B_lx2mc]LDDW.D1 *A_w++, A_si:A_co ; (p) load si:co
||[!B_lx2mc]MPY .M2 1, B_hafn2, B_lx2mc ; (p) reset load cntr
||[B_lx2iac]SUB .S2 B_lx2iac, 1, B_lx2iac ; (p) decr load cntr
|| ADDSP .L1 A_x2ia, A_rtemp, A_x2ias ; (e) x[2ia]=x[2ia]+rtemp
|| SUBSP .L2X A_x2iap1, B_itemp, B_x2mp1s ; (e) x[2m+1]=x[2ia+1]-itemp
||[!A_stcnt]MPY .M1X 1, B_n2, A_stcnt ; (e) reset store cntr
|| MV A11, A14 ; preserve store ptr
MPYSP .M2X A_co, B_x2mp1, B_p2 ; (p) p2=co*x[2m+1]
|| MV .S1 A0, A_x ; set the x[2ia] ptr
|| SHR .S2 B_8n2, 1, B_8n2 ; set B_8n2 for next
|| STW .D1T1 A_x2ias, *A14++ ; (e) store x[2ia]
|| STW .D2T2 B_x2mp1s, *B12[1] ; (e) store x[2m+1]
|| INTSP .L2 B_hafn2, B5 ; use L unit in a strange way
|| SUBSP .L1 A_x2ia, A_rtemp, A11 ; (e) x[2m]=x[2ia]-rtemp
|| MPYSP .M1X A_co, B_x2m, A_p1 ; (p) co*x[2m]
[B_lx2mc]SUB.S2 B_lx2mc, 1, B_lx2mc ; decr load cntr
||[!B_lx2iac]MPY.M2 1, B_hafn2, B_lx2iac ; reset load cntr
|| ADDSP .L2X A_x2iap1, B_itemp, B_x2iap1s ; x[2ia+1]=x[2ia+1]+itemp
|| STW .D1 B_x2iap1s, *A14++ ; store x[2ia+1]
|| STW .D2 A_x2ms, *B12++[2] ; store x[2m]
||[A_stcnt]SUB.S1 A_stcnt, 1, A_stcnt ; decr store cntr
[B_hafn2]LDDW.D1 *A_x++, A_x2iap1:A_x2ia ; (e) load x[2ia+1]:x[2ia]
|| MPYSP .M1X A_si, B_x2mp1, A_p3 ; (p) p3=si*x[2m+1]
|| MPYSP .M2X A_si, B_x2m, B_p4 ; (p) p4=si*x[2m]
||[!B_lx2mc]ADDAW.D2 B_x, B_n2, B_x ; (p) incr ptr if required
|| ADDSP .L1 A_p1, A_p3, A_rtemp ; (p) rtemp=p1+p3
|| SUBSP .L2 B_p2, B_p4, B_itemp ; (p) itemp=p2-p4
||[!A_stcnt]ADD.S2 B12, B9, B12 ; (e) incr store ptr if required
||[!A_stcnt]ADD.S1 A14, A_8n2, A14 ; (e) incr store ptr if required
[B_hafn2] LDDW.D2 *B_x++, B_x2mp1:B_x2m ; (p) load x[2m+1]:x[2m]
||[!B_lx2mc]LDDW.D1 *A_w++, A_si:A_co ; (p) load si:co
||[!B_lx2mc]MPY .M2 1, B_hafn2, B_lx2mc ; (p) reset load cntr
|| ADDSP .L1 A_x2ia, A_rtemp, A_x2ias ; (p) x[2ia]=x[2ia]-rtemp
|| SUBSP .L2X A_x2iap1, B_itemp, B_x2mp1s ; (p) x[2m+1]=x[2ia+1]-itemp
||[B_lx2iac]SUB.S2 B_lx2iac, 1, B_lx2iac ; decr load cntr
||[!A_stcnt]SHR.S1 A_8n2, 3, A_stcnt ; (e) reset store cntr
|| MPY .M1X B_n2, 4, A15 ; generate incrment
MPYSP .M1X A_co, B_x2m, A_p1 ; p1=co*x[2m]
|| MPYSP .M2X A_co, B_x2mp1, B_p2 ; p2=co*x[2m+1]
||[A_nby2]B .S1 loop ; Branch next outer loop
|| STW .D1T1 A_x2ias, *A14++ ; store x[2ia]
|| STW .D2T2 B_x2mp1s, *B12[1] ; store x[2m+1]
|| SPINT .L2 B5, B_n2 ; get B_n2 for next iteration
|| ADD .S2 B14, B_8n2, B5 ; get store ptr
||[A_stcnt]SUB.L1 A_stcnt, 1, A_stcnt ; decr store cntr
[B_lx2mc]SUB.S2 B_lx2mc, 1, B_lx2mc ; decr load cntr
||[!B_lx2iac]MPY.M2 1, B_hafn2, B_lx2iac ; reset load cntr
|| SUBSP .L1 A_x2ia, A_rtemp, A_x2ms ; x[2m]=x[2ia]-rtemp
|| ADDSP .L2X A_x2iap1, B_itemp, B_x2iap1s ; p itemp3 = t3_1 - itemp1
|| STW .D1 B_x2iap1s, *A14++ ; store x[2ia+1]
|| STW .D2 A11, *B12++[2] ; store x[2m]
||[A_nby2]MPY .M1X B15, 1, A_nby2 ; set loop counter
||[!B_lx2iac]ADD.S1 A_x, A15, A_x ; incr load ptr
[B_hafn2] LDDW.D1 *A_x++, A_x2iap1:A_x2ia ; (p) load x[2ia+1]:x[2ia]
|| MPYSP .M1X A_si, B_x2mp1, A_p3 ; (p) p3=si*x[2m+1]
|| MPYSP .M2X A_si, B_x2m, B_p4 ; (p) p4=si*x[2m]
||[!B_lx2mc]ADDAW.D2 B_x, B_n2, B_x ; (p) incr ptr if required
|| ADDSP .L1 A_p1, A_p3, A_rtemp ; (p) rtemp=p1+p3
|| SUBSP .L2 B_p2, B_p4, B_itemp ; (p) itemp=p2-p4
||[!A_stcnt]ADD.S2 B12, B9, B12 ; (e) incr store ptr if required
||[!A_stcnt]ADD.S1 A14, A_8n2, A14 ; (e) incr store ptr if required
[B_hafn2] LDDW.D2 *B_x++, B_x2mp1:B_x2m ; (p) load x[2m+1]:x[2m]
||[!B_lx2mc]LDDW.D1 *A_w++, A_si:A_co ; (p) load si:co
||[!B_lx2mc]MPY .M2 1, B_hafn2, B_lx2mc ; (p) reset load cntr
||[B_lx2iac]SUB .S2 B_lx2iac, 1, B_lx2iac ; (p) x[2ia]=x[2ia]-rtemp
|| ADDSP .L1 A_x2ia, A_rtemp, A_x2ias ; (p) x[2m+1]=x[2ia+1]-itemp
|| SUBSP .L2X A_x2iap1, B_itemp, B_x2mp1s ; x[2m+1]=x[2ia+1]-itemp
|| MPY .M1X 4, B_n2, A_8n2 ; set A_8n2
|| MV .S1 A0, A11 ; set load ptr
MPYSP .M1X A_co, B_x2m, A_p1 ; p1=co*x[2m]
|| MPYSP .M2X A_co, B_x2mp1, B_p2 ; p2=co*x[2m+1]
|| SHR .S2 B_hafn2, 1, B_hafn2 ; for next outer loop
|| STW .D1T1 A_x2ias, *A14++ ; store x[2ia]
|| STW .D2T2 B_x2mp1s, *B12[1] ; store x[2m+1]
||[A_nby2]B .S1 loop ; branch
[B_lx2mc]SUB .S2 B_lx2mc, 1, B_lx2mc ; decr load cntr
||[!B_lx2iac]MPY.M2 1, B_n2, B_lx2iac ; reset load cntr
|| SUBSP .L1 A_x2ia, A_rtemp, A_x2ms ; x[2m]=x[2ia]-rtemp
|| ADDSP .L2X A_x2iap1, B_itemp, B_x2iap1s ; x[2ia+1]=x[2ia+1]-itemp
|| STW .D1 B_x2iap1s, *A14 ; store x[2ia+1]
|| STW .D2 A_x2ms, *B12 ; store x[2m]
|| MPY .M1 A_stcnt, 0, A_stcnt ; reset store count
||[!B_lx2iac]ADD.S1 A_x, A_8n2, A_x ; incr load ptr
****************************************************************************
MVC .S2 IRP, B15
MV .S1X B15, A1
|| LDW .D2T2 *B15[12], B3
LDW .D2T1 *B15[0], A10
|| LDW .D1T2 *A1[13], B10
LDW .D2T1 *B15[1], A11
|| LDW .D1T2 *A1[6], B2
LDW .D2T1 *B15[3], A12
|| LDW .D1T2 *A1[2], B1
LDW .D2T1 *B15[5], A13
|| LDW .D1T2 *A1[8], B13
LDW .D2T1 *B15[7], A14
|| LDW .D1T2 *A1[10], B14
LDW .D2T1 *B15[9], A15
|| LDW .D1T2 *A1[4], B11
|| B .S2 B3
MVC .S2 B2, IRP
|| LDW .D1T2 *A1[11], B12
NOP 2
ADDAW B15, 16, B15
MVC .S2 B1, CSR
.end
* ======================================================================== *
* End of file: sp_cfftr2_dit.asm *
* ------------------------------------------------------------------------ *
* Copyright (C) 2003 Texas Instruments, Incorporated. *
* All Rights Reserved. *
* ======================================================================== *⌨️ 快捷键说明
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