hamaro_regs.h

机顶盒Hamaro解调器驱动。包含自动搜台

    HAMARO_CX24128_LO4_1C = 0x1C,
    HAMARO_CX24128_BB1_1D = 0x1D,
    HAMARO_CX24128_BB2_1E = 0x1E,
    HAMARO_CX24128_BB3_1F = 0x1F,
    HAMARO_CX24128_RF_20 = 0x20,
    HAMARO_CX24128_ENABLE_21 = 0x21
}HAMARO_VIPER_REGISTER_ADDRESS;

/**********************************************************************************
 * Viper tuner register bit-field enumerations
 **********************************************************************************/
typedef enum hamaro_viper_register_bit_field {  
    /* T1 */
    HAMARO_CX24128_DSM_CLK,                       /* Address 0x10[7], RW */
    HAMARO_CX24128_PS_TEST,                       /* Address 0x10[6], RW */    
    HAMARO_CX24128_ICP_MAN,                       /* Address 0x10[5:4], RW */ 
    HAMARO_CX24128_IDIG_SEL,                      /* Address 0x10[3:2], RW */
    HAMARO_CX24128_LOCK_DET,                      /* Address 0x10[1], RO */
    HAMARO_CX24128_MOR,                           /* Address 0x10[0], RW */
    HAMARO_CX24128_ICP_LEVEL,                     /* Address 0x11[7:0], RW */
    HAMARO_CX24128_BS_DELAY,                      /* Address 0x12[7:4], RW */
    HAMARO_CX24128_ACP_ON_ALW,                    /* Address 0x12[2], RW */
    HAMARO_CX24128_ICP_SEL,                       /* Address 0x12[1:0], RO */

    HAMARO_CX24128_BS_VCOMT,                      /* Address 0x14[7:6], ISEL */
    HAMARO_CX24128_BS_FREQ,                       /* Address 0x14[4:0] and 0x15[7:0], RW */
    HAMARO_CX24128_BS_DIV_CNT,                    /* Address 0x16[7:0] and 0x17[7:4], RW */
    HAMARO_CX24128_BS_ERR,                        /* Address 0x17[0], RO */
    HAMARO_CX24128_DIV24_SEL,                     /* Address 0x18[6], RW */
    HAMARO_CX24128_VCO_SEL_SPI,                   /* Address 0x18[5:1], RW */

    /* -- Mongoose RevB -- */
    HAMARO_CX24128_VCO6_SEL_SPI,                  /* Address 0x18[7], RW */
    HAMARO_CX24128_VCO_BSH_SPI,                   /* Address 0x18[0], RW */
    HAMARO_CX24128_INT,                           /* Address 0x19[7:0] and 0x1A[7], RW */
    HAMARO_CX24128_FRACTN,                        /* Address 0x1A[6:0] and 0x1B[7:0] and 0x1C[7:5], RW */
    HAMARO_CX24128_SYS_RESET,                     /* Address 0x1C[4], WO */
    HAMARO_CX24128_AMP_OUT,                       /* Address 0x1D[3:0], RW */
    HAMARO_CX24128_FILTER_BW,                     /* Address 0x1E[7:6], RW */
    HAMARO_CX24128_GMC_BW,                        /* Address 0x1E[5:0], RW */
    HAMARO_CX24128_VGA2_OFFSET,                   /* Address 0x1F[5:3], RW */
    HAMARO_CX24128_VGA1_OFFSET,                   /* Address 0x1F[2:0], RW */

    /* -- Mongoose RevB -- */
    HAMARO_CX24128_RFBC_DISABLE,                  /* Address 0x20[4],   RW */
    HAMARO_CX24128_RF_OFFSET,                     /* Address 0x20[3:2], RW */
    HAMARO_CX24128_LNA_GC,                        /* Address 0x20[1:0], RW */
    HAMARO_CX24128_EN,                            /* Address 0x21[5:0], RW */
    HAMARO_CX24128_LNA_EN,                        /* Address 0x21[1], RW */

    HAMARO_VIPER_REGISTER_BITFIELD_INVALID=0xFFFF
}HAMARO_VIPER_REGISTER_BIT_FIELD;


/**********************************************************************************
 * Viper tuner BTI register address enumerations 
 **********************************************************************************/
typedef enum hamaro_viper_bti_register_address {
    /* global */
	HAMARO_BTI_CX24128_CHIP_ID_AND_VERSION = 0x00,
    HAMARO_BTI_CX24128_XTAL = 0x01,
    HAMARO_BTI_CX24128_TEST_MUX_SEL = 0x01,
	/* tuner */
    HAMARO_BTI_CX24128_LO_TEST = 0x02,
    HAMARO_BTI_CX24128_LO_CTL1 = 0x02,

    HAMARO_BTI_CX24128_LO_CTL2 = 0x03,

	HAMARO_BTI_CX24128_BAND_SEL2 = 0x04,
    HAMARO_BTI_CX24128_BAND_SEL3 = 0x04,

    HAMARO_BTI_CX24128_BAND_SEL4 = 0x05,
    HAMARO_BTI_CX24128_BAND_SEL5 = 0x05,

    HAMARO_BTI_CX24128_VCO = 0x06,
    HAMARO_BTI_CX24128_LO1 = 0x06,

    HAMARO_BTI_CX24128_LO2 = 0x07,
    HAMARO_BTI_CX24128_LO3 = 0x07,

    HAMARO_BTI_CX24128_LO4 = 0x08,
    HAMARO_BTI_CX24128_BB1 = 0x08,

    HAMARO_BTI_CX24128_BB2 = 0x09,
    HAMARO_BTI_CX24128_BB3 = 0x09,

    HAMARO_BTI_CX24128_RF = 0x0A,
    HAMARO_BTI_CX24128_ENABLE = 0x0A
}HAMARO_VIPER_BTI_REGISTER_ADDRESS;

/**********************************************************************************
 * Viper tuner BTI register bit-field enumerations
 **********************************************************************************/
typedef enum hamaro_bti_register_bit_field {  
    /* T1 */
    HAMARO_BTI_CX24128_DSM_CLK,                       /* Address 0x02[15], RW */
    HAMARO_BTI_CX24128_PS_TEST,                       /* Address 0x02[14], RW */    
    HAMARO_BTI_CX24128_ICP_MAN,                       /* Address 0x02[13:12], RW */ 
    HAMARO_BTI_CX24128_IDIG_SEL,                      /* Address 0x02[11:10], RW */
    HAMARO_BTI_CX24128_LOCK_DET,                      /* Address 0x02[9], RO */
    HAMARO_BTI_CX24128_MOR,                           /* Address 0x02[8], RW */
    HAMARO_BTI_CX24128_ICP_LEVEL,                     /* Address 0x02[7:0], RW */

    HAMARO_BTI_CX24128_BS_DELAY,                      /* Address 0x03[15:12], RW */
    HAMARO_BTI_CX24128_ACP_ON_ALW,                    /* Address 0x03[10], RW */
    HAMARO_BTI_CX24128_ICP_SEL,                       /* Address 0x03[9:8], RO */

    HAMARO_BTI_CX24128_BS_VCOMT,                      /* Address 0x04[15:14], ISEL */
    HAMARO_BTI_CX24128_BS_FREQ,                       /* Address 0x04[12:8] and 0x04[7:0], RW */

    HAMARO_BTI_CX24128_BS_DIV_CNT,                    /* Address 0x05[15:8] and 0x05[7:4], RW */
    HAMARO_BTI_CX24128_BS_ERR,                        /* Address 0x05[0], RO */

    HAMARO_BTI_CX24128_DIV24_SEL,                     /* Address 0x06[14], RW */
    HAMARO_BTI_CX24128_VCO_SEL_SPI,                   /* Address 0x06[13:9], RW */
    HAMARO_BTI_CX24128_VCO6_SEL_SPI,                  /* Address 0x06[15], RW */
    HAMARO_BTI_CX24128_VCO_BSH_SPI,                   /* Address 0x06[8], RW */
    HAMARO_BTI_CX24128_INT,                           /* Address 0x06[7:0] and 0x07[15], RW */

    HAMARO_BTI_CX24128_FRACTN,                        /* Address 0x07[14:8] and 0x07[7:0] and 0x08[15:13], RW */

    HAMARO_BTI_CX24128_SYS_RESET,                     /* Address 0x08[12], WO */
    HAMARO_BTI_CX24128_AMP_OUT,                       /* Address 0x08[11:8], RW */

    HAMARO_BTI_CX24128_FILTER_BW,                     /* Address 0x09[15:14], RW */
    HAMARO_BTI_CX24128_GMC_BW,                        /* Address 0x09[13:8], RW */
    HAMARO_BTI_CX24128_VGA2_OFFSET,                   /* Address 0x09[5:3], RW */
    HAMARO_BTI_CX24128_VGA1_OFFSET,                   /* Address 0x09[2:0], RW */

    HAMARO_BTI_CX24128_RFBC_DISABLE,                  /* Address 0x0A[12],   RW */
    HAMARO_BTI_CX24128_RF_OFFSET,                     /* Address 0x0A[11:10], RW */
    HAMARO_BTI_CX24128_LNA_GC,                        /* Address 0x0A[9:8], RW */
    HAMARO_BTI_CX24128_EN,                            /* Address 0x0A[5:0], RW */
    HAMARO_BTI_CX24128_LNA_EN                         /* Address 0x0A[1], RW */
}HAMARO_VIPER_BTI_REGISTER_BIT_FIELD;

extern const HAMARO_REGISTER_MAP hamaro_viper_register_map[];

#endif

#if HAMARO_INCLUDE_RATTLER
BOOL 
HAMARO_TunerRegisterWrite(HAMARO_NIM*       p_nim,
					unsigned short   reg_field_index, 
					unsigned long    value,
					HAMARO_IO_METHOD  io_method);
BOOL 
HAMARO_TunerRegisterRead(HAMARO_NIM*         p_nim,
				   unsigned short     reg_field_index, 
				   unsigned long*     p_value,
				   HAMARO_IO_METHOD    io_method);
#endif

/*******************************************************************************************************/
/*******************************************************************************************************/
/*******************************************************************************************************/
#ifdef __cplusplus
}
#endif

#endif  /* #ifndef HAMARO_REGS_H_DEFINED */
/* CR 9509 : Add an extra newline */